index
:
sdk/emulator/qemu
1.0_post
2.0alpha
features/brillcodec_2i
features/camera
features/cnp
features/dr
features/qt_dr
features/smp
features/virtio-9p
features/vmodem
glesv3
master
opensrc_p2.3
opensrc_p2.3.1
opensrc_p2.3.2
opensrc_p2.4
opensrc_p3.0
opensrc_p4.0
sandbox/byungchul.so/tizen
sandbox/elebideau/tizen
sandbox/mmajewski2/maru-virgl-rendering-wip
sandbox/mmajewski2/standalone-virgl-wip
sandbox/pcoval/tizen
spin
tizen
tizen_2.0
tizen_2.1
tizen_2.2
tizen_3.0.m14.4_ivi
tizen_p2.3
tizen_p2.3.1
tizen_qemu_1.6
tizen_qemu_1.7
tizen_qemu_2.0
tizen_qemu_5.0.1
tizen_studio_1.2_p2.3
tizen_studio_1.2_p2.3.1
tizen_studio_1.2_p2.3.2
tizen_studio_1.2_p2.4
tizen_studio_1.2_p3.0
tizen_studio_1.3_p2.3
tizen_studio_1.3_p2.3.1
tizen_studio_1.3_p2.3.2
tizen_studio_1.3_p2.4
tizen_studio_1.3_p3.0
tizen_studio_2.0_p2.3
tizen_studio_2.0_p2.3.1
tizen_studio_2.0_p2.3.2
tizen_studio_2.0_p2.4
tizen_studio_2.0_p3.0
tizen_studio_2.0_p4.0
tizen_studio_2.0_p5.0
tizen_studio_3.0_p2.3
tizen_studio_3.0_p2.3.1
tizen_studio_3.0_p2.3.2
tizen_studio_3.0_p2.4
tizen_studio_3.0_p3.0
tizen_studio_3.0_p4.0
tizen_studio_3.0_p5.0
tizen_studio_3.5_p2.3
tizen_studio_3.5_p2.3.1
tizen_studio_3.5_p2.3.2
tizen_studio_3.5_p2.4
tizen_studio_3.5_p3.0
tizen_studio_3.5_p4.0
tizen_studio_3.5_p5.0
tizen_studio_3.5_p5.5
tizen_studio_4.0_p2.3
tizen_studio_4.0_p2.3.1
tizen_studio_4.0_p2.3.2
tizen_studio_4.0_p2.4
tizen_studio_4.0_p3.0
tizen_studio_4.0_p4.0
tizen_studio_4.0_p5.0
tizen_studio_4.0_p5.5
tizen_studio_4.0_p6.0
tizen_studio_4.5_p6.5
tizen_studio_5.0_p7.0
tizen_studio_5.5_p7.5
tizen_studio_5.5_p8.0
tizen_studio_6.0_p9.0
tizen_studio_p2.3
tizen_studio_p2.3.1
tizen_studio_p2.3.2
tizen_studio_p2.4
tizen_studio_p3.0
tizen_studio_p4.0
works/arg_renewal
Domain: SDK / Emulator;
summary
refs
log
tree
commit
diff
log msg
author
committer
range
path:
root
/
target-tricore
Age
Commit message (
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)
Author
Files
Lines
2016-03-01
tcg: Add type for vCPU pointers
LluĂs Vilanova
1
-1
/
+1
2016-02-25
target-tricore: add opd trap generation
Bastian Koppelmann
1
-8
/
+277
2016-02-25
target-tricore: add illegal opcode trap generation
Bastian Koppelmann
1
-19
/
+156
2016-02-25
target-tricore: add context managment trap generation
Bastian Koppelmann
1
-3
/
+30
2016-02-25
target-tricore: Add trap handling & SOVF/OVF traps
Bastian Koppelmann
4
-2
/
+147
2016-02-25
target-tricore: Fix wrong precedences on psw_write
Bastian Koppelmann
1
-4
/
+4
2016-02-25
target-tricore: fix save_context_upper using env->PSW
Bastian Koppelmann
1
-1
/
+1
2016-02-23
all: Clean up includes
Peter Maydell
1
-1
/
+0
2016-02-09
tcg: Change tcg_global_mem_new_* to take a TCGv_ptr
Richard Henderson
1
-11
/
+11
2016-02-03
log: do not unnecessarily include qom/cpu.h
Paolo Bonzini
1
-0
/
+1
2016-01-29
tricore: Clean up includes
Peter Maydell
4
-6
/
+4
2015-12-17
tricore: avoid "naked" qemu_log
Paolo Bonzini
1
-2
/
+2
2015-10-09
qdev: Protect device-list-properties against broken devices
Markus Armbruster
1
-0
/
+6
2015-10-07
tcg: Remove gen_intermediate_code_pc
Richard Henderson
1
-26
/
+5
2015-10-07
tcg: Pass data argument to restore_state_to_opc
Richard Henderson
1
-2
/
+3
2015-10-07
tcg: Add TCG_MAX_INSNS
Richard Henderson
1
-7
/
+13
2015-10-07
target-*: Increment num_insns immediately after tcg_gen_insn_start
Richard Henderson
1
-2
/
+1
2015-10-07
target-*: Unconditionally emit tcg_gen_insn_start
Richard Henderson
1
-0
/
+2
2015-09-25
tricore: Remove ELF_MACHINE from cpu.h
Peter Crosthwaite
1
-2
/
+0
2015-09-11
tlb: Add "ifetch" argument to cpu_mmu_index()
Benjamin Herrenschmidt
2
-2
/
+2
2015-09-11
maint: remove unused include for signal.h
Daniel P. Berrange
1
-1
/
+0
2015-08-24
tcg: Remove tcg_gen_trunc_i64_i32
Richard Henderson
1
-10
/
+10
2015-08-24
tcg: Split trunc_shr_i32 opcode into extr[lh]_i64_i32
Richard Henderson
1
-6
/
+6
2015-07-09
cpu-exec: Purge all uses of ENV_GET_CPU()
Peter Crosthwaite
1
-1
/
+1
2015-07-09
cpu: Change cpu_exec_init() arg to cpu, not env
Peter Crosthwaite
1
-1
/
+1
2015-07-09
cpu: Add Error argument to cpu_exec_init()
Bharata B Rao
1
-1
/
+1
2015-06-29
target-tricore: fix depositing bits from PCXI into ICR
Paolo Bonzini
1
-2
/
+2
2015-06-22
disas: Remove uses of CPU env
Peter Crosthwaite
1
-1
/
+1
2015-05-30
target-tricore: fix BOL_ST_H_LONGOFF using ld
Bastian Koppelmann
1
-1
/
+1
2015-05-30
target-tricore: fix msub32_q producing the wrong overflow bit
Bastian Koppelmann
1
-11
/
+0
2015-05-30
target-tricore: fix OPC2_32_RR_DVINIT_HU having write before use on the result
Bastian Koppelmann
1
-1
/
+1
2015-05-22
target-tricore: add RR_DIV and RR_DIV_U instructions of the v1.6 ISA
Bastian Koppelmann
4
-0
/
+74
2015-05-22
target-tricore: add FRET instructions of the v1.6 ISA
Bastian Koppelmann
2
-0
/
+21
2015-05-22
target-tricore: add FCALL instructions of the v1.6 ISA
Bastian Koppelmann
2
-0
/
+29
2015-05-22
target-tricore: add SYS_RESTORE instruction of the v1.6 ISA
Bastian Koppelmann
2
-0
/
+11
2015-05-22
target-tricore: add RR_CRC32 instruction of the v1.6.1 ISA
Bastian Koppelmann
4
-0
/
+19
2015-05-22
target-tricore: add SWAPMSK instructions of the v1.6.1 ISA
Bastian Koppelmann
2
-0
/
+44
2015-05-22
target-tricore: add CMPSWP instructions of the v1.6.1 ISA
Bastian Koppelmann
2
-0
/
+40
2015-05-22
target-tricore: Add SRC_MOV_E instruction of the v1.6 ISA
Bastian Koppelmann
1
-2
/
+9
2015-05-22
target-tricore: introduce ISA v1.6.1 feature
Bastian Koppelmann
2
-3
/
+8
2015-05-22
target-tricore: Add ISA v1.3.1 cpu and fix tc1796 to using v1.3
Bastian Koppelmann
1
-0
/
+8
2015-05-11
target-tricore: fix rfe not restoring the PC
Bastian Koppelmann
1
-0
/
+1
2015-05-11
target-tricore: fix rslcx restoring the upper context instead of the lower
Bastian Koppelmann
1
-1
/
+1
2015-05-11
target-tricore: fix BO_OFF10_SEXT calculating the wrong offset
Bastian Koppelmann
1
-1
/
+1
2015-05-11
target-tricore: fix SLR_LD_W and SLR_LD_W_POSTINC insn being a 2 byte memory ...
Bastian Koppelmann
1
-2
/
+2
2015-05-11
target-tricore: Fix LOOP using wrong register for compare
Bastian Koppelmann
1
-1
/
+1
2015-04-30
tcg: Delete unused cpu_pc_from_tb()
Peter Crosthwaite
1
-5
/
+0
2015-04-04
target-tricore: Fix check which was always false
Stefan Weil
1
-1
/
+1
2015-03-30
target-tricore: fix CACHEA/I_POSTINC/PREINC using data register..
Bastian Koppelmann
1
-4
/
+4
2015-03-24
target-tricore: properly fix dvinit_b/h_13
Bastian Koppelmann
1
-30
/
+10
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