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2010-03-17Large page TLB flushPaul Brook1-14/+26
QEMU uses a fixed page size for the CPU TLB. If the guest uses large pages then we effectively split these into multiple smaller pages, and populate the corresponding TLB entries on demand. When the guest invalidates the TLB by virtual address we must invalidate all entries covered by the large page. However the address used to invalidate the entry may not be present in the QEMU TLB, so we do not know which regions to clear. Implementing a full vaiable size TLB is hard and slow, so just keep a simple address/mask pair to record which addresses may have been mapped by large pages. If the guest invalidates this region then flush the whole TLB. Signed-off-by: Paul Brook <paul@codesourcery.com>
2010-03-12Target specific usermode cleanupPaul Brook2-1/+16
Disable various target specific code that is only relevant to system emulation. Signed-off-by: Paul Brook <paul@codesourcery.com>
2010-03-12Remove cpu_get_phys_page_debug from userspace emulationPaul Brook1-7/+1
cpu_get_phys_page_debug makes no sense for userspace emulation, so remove it. Signed-off-by: Paul Brook <paul@codesourcery.com>
2010-03-12Move TARGET_PHYS_ADDR_SPACE_BITS to target-*/cpu.h.Richard Henderson1-0/+8
Removes a set of ifdefs from exec.c. Introduce TARGET_VIRT_ADDR_SPACE_BITS for all targets other than Alpha. This will be used for page_find_alloc, which is supposed to be using virtual addresses in the first place. Signed-off-by: Richard Henderson <rth@twiddle.net>
2010-02-25target-sparc: fix --enable-debug build for 64 bit hostStefan Weil1-1/+1
b551ec04ca45d1925417dd2ec7c1b7f115c84f1d fixed the compilation for 32 bit hosts, but introduced a new error for 64 bit hosts: tcg_temp_new_ptr needs a matching tcg_temp_free_ptr. Signed-off-by: Stefan Weil <weil@mail.berlios.de> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-02-20target-sparc: fix --enable-debug buildJay Foad1-11/+11
Use 32-bit arithmetic for the address offset calculation to fix a build failure on 32-bit hosts. Signed-off-by: Jay Foad <jay.foad@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-01-31sparc32 don't mark page dirty when failingArtyom Tarasenko1-5/+6
if the access check fails, the page can not be modified and shouldn't be marked dirty. The patch fixes the "hsfs_putpage: dirty HSFS page" error in Solaris guests. Signed-off-by: Artyom Tarasenko <atar4qemu@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-01-27sparc64: reimplement tick timers v4Igor V. Kovalenko2-13/+29
sparc64 timer has tick counter which can be set and read, and tick compare value used as deadline to fire timer interrupt. The timer is not used as periodic timer, instead deadline is set each time new timer interrupt is needed. v3 -> v4: - coding style v2 -> v3: - added missing timer debug output macro - CPUTimer struct and typedef moved to cpu.h - change CPU_SAVE_VERSION to 6, older save formats not supported v1 -> v2: - new conversion helpers cpu_to_timer_ticks and timer_to_cpu_ticks - save offset from clock source to implement cpu_tick_set_count - renamed struct sun4u_timer to CPUTimer - load and save cpu timers v0 -> v1: - coding style Signed-off-by: Igor V. Kovalenko <igor.v.kovalenko@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-01-27sparc64: correct write extra bits to cwpIgor V. Kovalenko1-1/+1
- correctly fit to cwp if provided window number is out of range Signed-off-by: Igor V. Kovalenko <igor.v.kovalenko@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-01-23sparc32 fix np dereference in do_unassigned_accessArtyom Tarasenko1-1/+2
fix a potential null pointer dereference introduced in commit 576c2cdc767ab9e2dc038fa4c99f22e53287a3de Signed-off-by: Artyom Tarasenko <atar4qemu@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-01-19kill regs_to_env and env_to_regsPaolo Bonzini1-8/+0
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2010-01-17Sparc: improve CPU register dumpBlue Swirl1-30/+55
Common: * Remove unnecessary 0x prefix * Print %y * Fix NZVC flag print order to match CPU bit order Sparc64 specific: * Print registers without line wrapping * Print %f40-%f63 * Pretty print CCR flags * Print %fsr and %fprs in full precision * More consistent formatting Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-01-15sparc32 do_unassigned_access overhaul v2Artyom Tarasenko1-12/+30
According to pages 9-31 - 9-34 of "SuperSPARC & MultiCache Controller User's Manual": 1. "A lower priority fault may not overwrite the MFSR status of a higher priority fault." 2. The MFAR is overwritten according to the policy defined for the MFSR 3. The overwrite bit is asserted if the fault status register (MFSR) has been written more than once by faults of the same class 4. SuperSPARC will never place instruction fault addresses in the MFAR. Implementation of points 1-3 allows booting Solaris 2.6 and 2.5.1. v2: CODING_STYLE fixes Signed-off-by: Artyom Tarasenko <atar4qemu@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-01-13Sparc32: remove unused variable, spotted by clangBlue Swirl1-5/+0
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-01-08sparc64: interrupt trap handlingIgor V. Kovalenko1-0/+10
cpu_check_irqs - handle SOFTINT register TICK and STICK timer bits - only check interrupt levels greater than PIL value - handle preemption by higher level traps cpu_exec - handle CPU_INTERRUPT_HARD only if interrupts are enabled - PIL 15 is not special level on sparcv9 Signed-off-by: Igor V. Kovalenko <igor.v.kovalenko@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-01-08sparc64: move cpu_interrupts_enabled to cpu.hIgor V. Kovalenko2-13/+13
- to be used by cpu_check_irqs Signed-off-by: Igor V. Kovalenko <igor.v.kovalenko@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-01-08sparc64: add macros to deal with softint and timer interruptIgor V. Kovalenko1-0/+4
Signed-off-by: Igor V. Kovalenko <igor.v.kovalenko@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-01-08sparc64: check for pending irq when pil, pstate or softint is changedIgor V. Kovalenko1-3/+38
Signed-off-by: Igor V. Kovalenko <igor.v.kovalenko@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-01-08sparc64: use helper_wrpil to check pending irq on writeIgor V. Kovalenko3-4/+16
Signed-off-by: Igor V. Kovalenko <igor.v.kovalenko@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-01-08sparc64: add PIL to cpu state dumpIgor V. Kovalenko1-0/+1
Signed-off-by: Igor V. Kovalenko <igor.v.kovalenko@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-01-08sparc64: trace pstate and global register set changesIgor V. Kovalenko1-0/+20
Signed-off-by: Igor V. Kovalenko <igor.v.kovalenko@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-01-08sparc64: change_pstate should have 32bit argumentIgor V. Kovalenko1-3/+3
- pstate is 32bit variable, no need to pass 64bit value around Signed-off-by: Igor V. Kovalenko <igor.v.kovalenko@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-01-07Sparc32: clear exception_index with -1 valueBlue Swirl1-1/+1
See also 821b19fe923ac49a24cdb4af902584fdd019cee6. Spotted by Artyom Tarasenko and Igor Kovalenko. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-01-06sparc64: clear exception_index with -1 valueIgor V. Kovalenko1-1/+1
Signed-off-by: Igor V. Kovalenko <igor.v.kovalenko@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-01-03pass env to raise_exception if called outside of op_helper codeIgor V. Kovalenko1-2/+5
- this fixes stepping with gdb, where do_unassigned_access may be called from gdb handler, outside of generated code Signed-off-by: Igor V. Kovalenko <igor.v.kovalenko@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-01-03sparc64: switch to MMU global registers in more MMU related trapsIgor V. Kovalenko1-3/+3
- extended range of MMU related traps which use MMU global registers, as listed in Ultrasparc-IIi document - no visible changes, since emulation do not cause added traps Signed-off-by: Igor V. Kovalenko <igor.v.kovalenko@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-12-05Sparc64: handle MMU global bit and nucleus contextBlue Swirl2-11/+21
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-12-04Sparc64: fix compilation with DEBUG_MMUBlue Swirl1-15/+15
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-11-07user: move CPU reset call to main.c for x86/PPC/SparcBlue Swirl1-3/+0
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-11-07sparc32 (mostly): remove unneeded calls to device resetBlue Swirl1-0/+2
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-11-04Sparc: fix carry flag handling (Solaris bootblk fix)Artyom Tarasenko1-61/+30
The page 108 of the SPARC Version 8 Architecture Manual describes that addcc and addxcc shall compute carry flag the same way. The page 110 claims the same about subcc and subxcc instructions. This patch fixes carry computation in corner cases and removes redundant code. The most visible effect of the patch is enabling Solaris boot when using OBP. Signed-off-by: Artyom Tarasenko <atar4qemu@gmail.com> [blauwirbel@gmail.com: cleaned up formatting] Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-10-13sparc64: fix done instruction pcIgor V. Kovalenko1-1/+1
Fix done instruction to resume with pc=tnpc, npc=tnpc+4 Signed-off-by: Igor V. Kovalenko <igor.v.kovalenko@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-10-01Revert "Get rid of _t suffix"Anthony Liguori3-37/+37
In the very least, a change like this requires discussion on the list. The naming convention is goofy and it causes a massive merge problem. Something like this _must_ be presented on the list first so people can provide input and cope with it. This reverts commit 99a0949b720a0936da2052cb9a46db04ffc6db29. Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-10-01Get rid of _t suffixmalc3-37/+37
Some not so obvious bits, slirp and Xen were left alone for the time being. Signed-off-by: malc <av1474@comtv.ru>
2009-09-23sparc64-8bit-asiIgor V. Kovalenko2-0/+6
Sparc64 alternate space load/store helpers expect 8 bit ASI value, while wrasi implementation sign-extends ASI operand causing for example 0x80 to appear as 0xFFFFFF80. Resulting value falls out of switch in helpers and causes obscure load/store faults. - correct wrasi by masking lower 8 bits of xor result - use lower 8 bits of ASI register in helpers Signed-off-by: Igor V. Kovalenko <igor.v.kovalenko@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-09-12Fix sys-queue.h conflict for goodBlue Swirl1-2/+2
Problem: Our file sys-queue.h is a copy of the BSD file, but there are some additions and it's not entirely compatible. Because of that, there have been conflicts with system headers on BSD systems. Some hacks have been introduced in the commits 15cc9235840a22c289edbe064a9b3c19c5f49896, f40d753718c72693c5f520f0d9899f6e50395e94, 96555a96d724016e13190b28cffa3bc929ac60dc and 3990d09adf4463eca200ad964cc55643c33feb50 but the fixes were fragile. Solution: Avoid the conflict entirely by renaming the functions and the file. Revert the previous hacks. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-08-24cleanup cpu-exec.c, part 0/N: consolidate handle_cpu_signalNathan Froyd1-0/+1
handle_cpu_signal is very nearly copy-paste code for each target, with a few minor variations. This patch sets up appropriate defaults for a generic handle_cpu_signal and provides overrides for particular targets that did things differently. Fixing things like the persistent (XXX: use sigsetjmp) should now become somewhat easier. Previous comments on this patch suggest that the "activate soft MMU for this block" comments refer to defunct functionality. I have removed such blocks for the appropriate targets in this patch. Signed-off-by: Nathan Froyd <froydnj@codesourcery.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-08-22sparc32 remove an unnecessary cpu irq setBlue Swirl1-35/+30
Signed-off-by: Artyom Tarasenko <atar4qemu@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-08-22Sparc32/64: fix jmpl followed by branchBlue Swirl1-0/+2
Fix a case where 'jmpl' instruction followed by a branch instruction was handled incorrectly. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-08-18Sparc32/64: Fix user emulator breakageBlue Swirl1-1/+1
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-08-15Fix desynchronization of condition code state when a memory access trapsBlue Swirl1-0/+11
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-08-04Sparc64: replace tsptr with helper routineIgor Kovalenko5-39/+68
tl and tsptr of members sparc64 cpu state must be changed simultaneously to keep trap state window in sync with current trap level. Currently translation of store to tl does not change tsptr, which leads to corrupt trap state on corresponding trap level. This patch removes tsptr from sparc64 cpu state and replaces all uses with call to helper routine. Changes v0->v1: - reimplemented helper routine with tcg generator - on cpu reset trap type and pstate are populated with power-on reset values, including tl=maxtl Signed-off-by: igor.v.kovalenko@gmail.com Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-07-31sparc64 flush pending conditional evaluations before exposing cpu stateIgor Kovalenko1-0/+5
If translation block is interrupted by e.g. mmu exception we need to compute conditional flags for inclusion into saved cpu state. Otherwise after return from trap conditional instructions would use stale psr/xcc data. Signed-off-by: igor.v.kovalenko@gmail.com -- Kind regards, Igor V. Kovalenko
2009-07-27rename WORDS_BIGENDIAN to HOST_WORDS_BIGENDIANJuan Quintela1-1/+1
Signed-off-by: Juan Quintela <quintela@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-07-27sparc64 really implement itlb/dtlb automatic replacement writesIgor Kovalenko3-90/+84
- implement "used" bit in tlb translation entry - mark tlb entry used if qemu code/data translation succeeds - fold i/d mmu replacement writes code into replace_tlb_1bit_lru which adds 1bit lru replacement algorithm; previously code tried to replace first unlocked entry only - extract more bitmasks to named macros - add "immu" or "dmmu" type name to debugging output where appropriate Signed-off-by: igor.v.kovalenko@gmail.com -- Kind regards, Igor V. Kovalenko
2009-07-27sparc64 name mmu registers and general cleanupIgor Kovalenko4-111/+225
- add names to mmu registers, this helps understanding the code which uses/modifies them. - fold i/d mmu tlb entries tag and tte arrays into arrays of tlb entries - extract demap_tlb routine (code duplication) - extract replace_tlb routine (code duplication) - flush qemu tlb translations when replacing sparc64 mmu tlb entries I have no test case which demands flushing qemu translations, and this patch should have no other visible changes to runtime. Signed-off-by: igor.v.kovalenko@gmail.com -- Kind regards, Igor V. Kovalenko
2009-07-20Fix most warnings (errors with -Werror) when debugging is enabledBlue Swirl2-15/+19
I used the following command to enable debugging: perl -p -i -e 's/^\/\/#define DEBUG/#define DEBUG/g' * */* */*/* Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-07-16Update to a hopefully more future proof FSF addressBlue Swirl2-4/+2
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-07-12sparc64: trap handling correctionsIgor Kovalenko4-25/+75
On Sun, Jul 12, 2009 at 12:09 PM, Blue Swirl<blauwirbel@gmail.com> wrote: > On 7/12/09, Igor Kovalenko <igor.v.kovalenko@gmail.com> wrote: >> Good trap handling is required to process interrupts. >>  This patch fixes the following: >> >>  - sparc64 has no wim register >>  - sparc64 has no psret register, use IE bit of pstate >>   extract IE checking code to cpu_interrupts_enabled >>  - alternate globals are not available if cpu has GL feature >>   in this case bit AG of pstate is constant zero >>  - write to pstate must actually write pstate >>   even if cpu has GL feature >> >>  Also timer interrupt is handled using do_interrupt. > > A bit too much for one patch. Please also remove the code instead of > commenting out. I now excluded timer interrupt related part. To my mind other changes are essentially tied together. > PUT_PSR for Sparc64 needs CC_OP = CC_OP_FLAGS; like Sparc32. Fixed, please find attached the updated version. -- Kind regards, Igor V. Kovalenko
2009-07-12sparc64: fix helper_st_asi little endian case typoIgor Kovalenko1-6/+6
On Sun, Jul 12, 2009 at 12:43 AM, Stuart Brady<sdbrady@ntlworld.com> wrote: > On Sat, Jul 11, 2009 at 10:22:18PM +0400, Igor Kovalenko wrote: >> It is clear that intention is to byte-swap value to be written, not >> the target address. > > @@ -1949,13 +1949,13 @@ void helper_st_asi(target_ulong addr, ta >     case 0x89: // Secondary LE >         switch(size) { >         case 2: > -            addr = bswap16(addr); > +            addr = bswap16(val); >             ^^^^ > Shouldn't that be 'val = bswap16(val)' (and likewise for the 32-bit and > 64-bit cases)?  Also needs a 'signed-off-by:'... > > Cheers, > -- > Stuart Brady > Thanks, that part I did not runtime-tested. Not sure if those asi stores are of any use for user-mode emulator. Please find attached the corrected version. Signed-off-by: igor.v.kovalenko@gmail.com -- Kind regards, Igor V. Kovalenko
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