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AgeCommit message (Expand)AuthorFilesLines
2013-01-15cpu: Move cpu_index field to CPUStateAndreas Färber1-1/+1
2012-12-19fpu: move public header file to include/fpuPaolo Bonzini1-1/+1
2012-12-19softmmu: move include files to include/sysemu/Paolo Bonzini2-2/+2
2012-12-19misc: move include files to include/qemu/Paolo Bonzini3-3/+3
2012-12-19qom: move include files to include/qom/Paolo Bonzini1-1/+1
2012-12-19exec: move include files to include/exec/Paolo Bonzini5-12/+12
2012-12-19build: kill libdis, move disassemblers to disas/Paolo Bonzini1-1/+1
2012-12-16exec: refactor cpu_restore_stateBlue Swirl3-25/+12
2012-12-10Merge remote-tracking branch 'stefanha/trivial-patches' into stagingAnthony Liguori1-1/+0
2012-12-08TCG: Use gen_opc_instr_start from context instead of global variable.Evgeny Voevodin1-3/+3
2012-12-08TCG: Use gen_opc_icount from context instead of global variable.Evgeny Voevodin1-1/+1
2012-12-08TCG: Use gen_opc_pc from context instead of global variable.Evgeny Voevodin1-2/+2
2012-12-07target-sparc: Remove t0, t1 from CPUSPARCStateRichard Henderson1-1/+0
2012-11-17TCG: Use gen_opc_buf from context instead of global variable.Evgeny Voevodin1-3/+3
2012-11-17TCG: Use gen_opc_ptr from context instead of global variable.Evgeny Voevodin1-4/+4
2012-11-10disas: avoid using cpu_single_envBlue Swirl1-1/+1
2012-11-03Merge branch 'trivial-patches' of git://github.com/stefanha/qemuBlue Swirl2-5/+6
2012-11-01target-sparc: make do_unaligned_access staticBlue Swirl2-5/+6
2012-10-31cpus: Pass CPUState to [qemu_]cpu_has_work()Andreas Färber1-1/+3
2012-10-30target-sparc: Revert setting cpu_dst to gen_dest_gprRichard Henderson1-1/+1
2012-10-28target-sparc: rename helper flagsAurelien Jarno1-25/+25
2012-10-23Rename target_phys_addr_t to hwaddrAvi Kivity3-39/+39
2012-10-20target-sparc: fix FMOVr instructionAurelien Jarno1-1/+1
2012-10-20target-sparc: Remove cpu_tmp0 as a globalRichard Henderson1-85/+118
2012-10-20target-sparc: Make cpu_dst local to OP=2 insnsRichard Henderson1-4/+3
2012-10-20target-sparc: Only use cpu_dst for eventual writes to a gprRichard Henderson1-26/+26
2012-10-20target-sparc: Remove last uses of cpu_tmp64Richard Henderson1-11/+17
2012-10-20target-sparc: Remove cpu_tmp64 use from softint insnsRichard Henderson1-6/+6
2012-10-20target-sparc: Don't use a temporary for gen_dest_fpr_DRichard Henderson1-16/+16
2012-10-20target-sparc: Remove usage of cpu_tmp64 from most helper functionsRichard Henderson1-29/+44
2012-10-20target-sparc: Tidy ldfsr, stfsrRichard Henderson1-20/+17
2012-10-20target-sparc: Avoid cpu_tmp32 in Write Priv RegisterRichard Henderson1-32/+24
2012-10-20target-sparc: Avoid cpu_tmp32 in Read Priv RegisterRichard Henderson1-32/+21
2012-10-20target-sparc: Use get_temp_i32 in gen_dest_fpr_FRichard Henderson1-14/+14
2012-10-20target-sparc: Split out get_temp_i32Richard Henderson1-12/+17
2012-10-20target-sparc: Make the cpu_addr variable local to load/store handlingRichard Henderson1-11/+11
2012-10-20target-sparc: Cleanup cpu_src[12] allocationRichard Henderson1-9/+7
2012-10-20target-sparc: Finish conversion to gen_load_gprRichard Henderson1-38/+20
2012-10-20target-sparc: Convert swap to gen_load/store_gprRichard Henderson1-8/+8
2012-10-20target-sparc: Convert asi helpers to gen_*_gprRichard Henderson1-29/+32
2012-10-20target-sparc: Use gen_load_gpr in get_src[12]Richard Henderson1-46/+29
2012-10-20target-sparc: Conversion to gen_*_gpr, part 1Richard Henderson1-243/+177
2012-10-20target-sparc: Add gen_load/store/dest_gprRichard Henderson1-0/+52
2012-10-13target-sparc: Don't compute full flags value so oftenRichard Henderson3-19/+21
2012-10-13target-sparc: Avoid unnecessary local temporariesRichard Henderson1-21/+9
2012-10-13target-sparc: Optimize CC_OP_LOGIC conditionsRichard Henderson1-18/+40
2012-10-13target-sparc: Fix optimized %icc comparisonsRichard Henderson1-0/+1
2012-10-07target-sparc: Optimize conditionals using SUBCCRichard Henderson1-61/+131
2012-10-07target-sparc: Fall through from not-taken trapRichard Henderson1-5/+7
2012-10-07target-sparc: Cleanup "global" temporary allocationRichard Henderson1-19/+19
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