| Age | Commit message (Expand) | Author | Files | Lines |
|---|
| 2008-04-11 | Remove osdep.c/qemu-img code duplication | aurel32 | 1 | -0/+1 |
| 2008-03-30 | Remove incorrect discards and old unused defines (blueswir1). | pbrook | 1 | -64/+0 |
| 2008-03-29 | Change handling of source 2 | blueswir1 | 1 | -16/+22 |
| 2008-03-29 | Change handling of source register 1 | blueswir1 | 1 | -31/+36 |
| 2008-03-29 | Move CPU stuff unrelated to translation to helper.c | blueswir1 | 3 | -520/+524 |
| 2008-03-29 | Rename T[012] according to their roles | blueswir1 | 1 | -423/+435 |
| 2008-03-29 | Avoid writes to T1 except for loads/stores, convert some T0 uses to cpu_tmp0 | blueswir1 | 1 | -41/+41 |
| 2008-03-29 | Accidentally dropped one change from previous commit | blueswir1 | 1 | -2/+2 |
| 2008-03-26 | Concentrate cpu_T[012] use to one function | blueswir1 | 1 | -337/+318 |
| 2008-03-26 | Split icc and xcc flag calculations | blueswir1 | 1 | -135/+181 |
| 2008-03-26 | Remove some legacy definitions | blueswir1 | 1 | -278/+209 |
| 2008-03-24 | Fix a sign extension problem | blueswir1 | 1 | -1/+1 |
| 2008-03-23 | Fix mulscc | blueswir1 | 1 | -7/+10 |
| 2008-03-22 | Convert ldf/ldfsr and stf/stfsr to TCG | blueswir1 | 2 | -19/+13 |
| 2008-03-22 | Fix i32/i64/TL mismatches | blueswir1 | 1 | -148/+149 |
| 2008-03-21 | Remove leftover definitions | blueswir1 | 1 | -12/+0 |
| 2008-03-21 | Convert align checks to TCG | blueswir1 | 4 | -12/+27 |
| 2008-03-21 | Convert jumps to labels to TCG | blueswir1 | 2 | -8/+3 |
| 2008-03-21 | Convert save, restore, saved, restored, and flushw to TCG | blueswir1 | 4 | -104/+103 |
| 2008-03-21 | Convert other float and VIS ops to TCG | blueswir1 | 4 | -777/+799 |
| 2008-03-21 | Convert float move ops to TCG | blueswir1 | 3 | -325/+74 |
| 2008-03-18 | Convert udiv and sdiv ops to TCG | blueswir1 | 4 | -49/+58 |
| 2008-03-18 | Use ext_i32_i64 instead of ext32s_i64 | blueswir1 | 1 | -2/+2 |
| 2008-03-18 | Convert CCR and CWP ops to TCG | blueswir1 | 4 | -26/+29 |
| 2008-03-18 | Convert array8/16/32 and alignaddr to TCG | blueswir1 | 4 | -52/+45 |
| 2008-03-16 | Convert umul and smul to TCG | blueswir1 | 2 | -24/+48 |
| 2008-03-16 | Use a TCG global for pc and npc | blueswir1 | 1 | -18/+17 |
| 2008-03-16 | Convert mulscc to TCG, add cc_src2 | blueswir1 | 3 | -30/+56 |
| 2008-03-16 | Discard unused data, use less temps | blueswir1 | 1 | -365/+237 |
| 2008-03-15 | Use a TCG global for fsr | blueswir1 | 1 | -27/+22 |
| 2008-03-15 | Convert ldfsr and stfsr to TCG | blueswir1 | 4 | -13/+10 |
| 2008-03-14 | Eliminate some uses of T2 | blueswir1 | 1 | -13/+13 |
| 2008-03-14 | Convert udivx and sdivx to TCG | blueswir1 | 2 | -24/+30 |
| 2008-03-14 | Use memory globals for G registers | blueswir1 | 1 | -2/+18 |
| 2008-03-13 | Use tcg_const_tl for zero constant | blueswir1 | 1 | -42/+19 |
| 2008-03-13 | Convert condition code changing versions of add, sub, logic, and div to TCG | blueswir1 | 3 | -453/+427 |
| 2008-03-11 | Use a TCG global for regwptr | blueswir1 | 1 | -3/+3 |
| 2008-03-09 | Convert andn, orn and xnor to TCG | blueswir1 | 2 | -18/+6 |
| 2008-03-08 | Convert branches and conditional moves to TCG | blueswir1 | 3 | -650/+587 |
| 2008-03-06 | Convert exception ops to TCG | blueswir1 | 5 | -18/+19 |
| 2008-03-06 | Fix microSPARC II SFSR mask (Robert Reif) | blueswir1 | 1 | -1/+1 |
| 2008-03-05 | Convert Sparc64 trap state ops to TCG | blueswir1 | 4 | -69/+102 |
| 2008-03-04 | Convert float helpers to TCG, fix fabsq in the process | blueswir1 | 5 | -281/+232 |
| 2008-03-04 | Convert fmovr to TCG | blueswir1 | 1 | -15/+27 |
| 2008-03-02 | Convert tick operations to TCG | blueswir1 | 5 | -58/+90 |
| 2008-03-02 | Convert movr and (partially) movcc to TCG | blueswir1 | 2 | -24/+42 |
| 2008-03-02 | Convert addx, subx, next_insn and mov_pc_npc to TCG | blueswir1 | 2 | -27/+29 |
| 2008-02-27 | Temporary fix for i386 host | blueswir1 | 2 | -0/+27 |
| 2008-02-24 | Modify Sparc32/64 to use TCG | blueswir1 | 7 | -1551/+878 |
| 2008-02-14 | Fix remote debugger memory access problems reported by Matthias Stein | blueswir1 | 2 | -7/+12 |
