Age | Commit message (Expand) | Author | Files | Lines |
2013-07-23 | cpu: Introduce CPUClass::synchronize_from_tb() for cpu_pc_from_tb() | Andreas Färber | 1 | -6/+0 |
2013-07-09 | linux-user: Move cpu_clone_regs() and cpu_set_tls() into linux-user | Peter Maydell | 1 | -14/+0 |
2013-03-12 | cpu: Replace do_interrupt() by CPUClass::do_interrupt method | Andreas Färber | 1 | -1/+0 |
2013-03-12 | cpu: Move halted and interrupt_request fields to CPUState | Andreas Färber | 1 | -3/+1 |
2013-03-12 | target-sh4: Move PVR/PRR/CVR into SuperHCPUClass | Andreas Färber | 1 | -3/+0 |
2013-02-16 | target-sh4: Move TCG initialization to SuperHCPU initfn | Andreas Färber | 1 | -0/+1 |
2012-12-19 | fpu: move public header file to include/fpu | Paolo Bonzini | 1 | -3/+1 |
2012-12-19 | exec: move include files to include/exec/ | Paolo Bonzini | 1 | -3/+3 |
2012-10-31 | cpus: Pass CPUState to [qemu_]cpu_has_work() | Andreas Färber | 1 | -1/+3 |
2012-10-23 | Rename target_phys_addr_t to hwaddr | Avi Kivity | 1 | -8/+8 |
2012-06-04 | target-sh4: Let cpu_sh4_init() return SuperHCPU | Andreas Färber | 1 | -2/+10 |
2012-04-30 | target-sh4: QOM'ify CPU | Andreas Färber | 1 | -0/+2 |
2012-03-14 | Rename CPUState -> CPUArchState | Andreas Färber | 1 | -1/+1 |
2012-03-14 | target-sh4: Don't overuse CPUState | Andreas Färber | 1 | -5/+5 |
2011-08-07 | Remove unused is_softmmu parameter from cpu_handle_mmu_fault | Blue Swirl | 1 | -1/+1 |
2011-06-26 | Move cpu_has_work and cpu_pc_from_tb to cpu.h | Blue Swirl | 1 | -0/+13 |
2011-03-03 | target-sh4: move intr_at_halt out of cpu_halted() | Aurelien Jarno | 1 | -1/+1 |
2011-01-26 | sh4: implement missing mmaped TLB read functions | Aurelien Jarno | 1 | -0/+8 |
2011-01-26 | sh4: implement missing mmaped TLB write functions | Aurelien Jarno | 1 | -2/+6 |
2011-01-14 | target-sh4: fix reset on r2d | Aurelien Jarno | 1 | -6/+8 |
2011-01-14 | target-sh4: define FPSCR constants | Aurelien Jarno | 1 | -4/+31 |
2011-01-09 | target-sh4: implement writes to mmaped ITLB | Aurelien Jarno | 1 | -0/+2 |
2010-10-30 | target-xxx: Use fprintf_function (format checking) | Stefan Weil | 1 | -1/+2 |
2010-07-03 | remove exec-all.h inclusion from cpu.h | Paolo Bonzini | 1 | -1/+0 |
2010-07-03 | move cpu_pc_from_tb to target-*/exec.h | Paolo Bonzini | 1 | -6/+0 |
2010-03-12 | Target specific usermode cleanup | Paul Brook | 1 | -0/+2 |
2010-03-12 | Move TARGET_PHYS_ADDR_SPACE_BITS to target-*/cpu.h. | Richard Henderson | 1 | -0/+3 |
2010-02-09 | target-sh4: MMU: reduce the size of a TLB entry | Aurelien Jarno | 1 | -12/+11 |
2010-02-09 | sh7750: handle MMUCR TI bit | Aurelien Jarno | 1 | -0/+2 |
2009-10-01 | Revert "Get rid of _t suffix" | Anthony Liguori | 1 | -1/+1 |
2009-10-01 | Get rid of _t suffix | malc | 1 | -1/+1 |
2009-08-24 | cleanup cpu-exec.c, part 0/N: consolidate handle_cpu_signal | Nathan Froyd | 1 | -0/+1 |
2009-07-16 | Update to a hopefully more future proof FSF address | Blue Swirl | 1 | -2/+1 |
2009-04-01 | SH: Improve movca.l/ocbi emulation. | edgar_igl | 1 | -1/+14 |
2009-03-07 | The _exit syscall is used for both thread termination in NPTL applications, | pbrook | 1 | -1/+2 |
2009-03-03 | clean build: Fix remaining sh4 warnings | aurel32 | 1 | -0/+2 |
2009-03-02 | SH: Implement MOVCO.L and MOVLI.L | aurel32 | 1 | -0/+2 |
2009-02-07 | SH7750/51: add register BCR3, BCR4, PCR, RTCOR, RTCNT, RTCSR, SDMR2, SDMR3 an... | aurel32 | 1 | -0/+1 |
2009-01-04 | Update FSF address in GPL/LGPL boilerplate | aurel32 | 1 | -1/+1 |
2008-12-13 | target-sh4: make the initial value of SR easier to read | aurel32 | 1 | -0/+4 |
2008-12-13 | target-sh4: add prefi, icbi, synco | aurel32 | 1 | -0/+7 |
2008-12-13 | target-sh4: add SH7785 as CPU option | aurel32 | 1 | -0/+1 |
2008-12-11 | target-sh4: remove 2 warnings | aurel32 | 1 | -0/+4 |
2008-12-07 | SH4: Implement FD bit | aurel32 | 1 | -1/+2 |
2008-11-18 | Refactor translation block CPU state handling (Jan Kiszka) | aliguori | 1 | -0/+11 |
2008-11-18 | Convert CPU_PC_FROM_TB to static inline (Jan Kiszka) | aliguori | 1 | -5/+7 |
2008-09-15 | qemu sh4 nptl support | aurel32 | 1 | -0/+5 |
2008-09-02 | sh4: CPU versioning. | aurel32 | 1 | -0/+17 |
2008-09-01 | SH4: Remove dyngen leftovers | aurel32 | 1 | -3/+1 |
2008-08-22 | [sh4] memory mapped TLB entries | aurel32 | 1 | -0/+2 |