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2016-09-07target-ppc: add modulo word operationsNikunj A Dadhania1-0/+48
2016-09-07target-ppc: add cmprb instructionNikunj A Dadhania1-0/+39
2016-09-07target-ppc: adding addpcis instructionNikunj A Dadhania1-0/+26
2016-09-07target-ppc: Introduce POWER ISA 3.0 flagNikunj A Dadhania2-2/+5
2016-09-07target-ppc: Introduce Power9 familyAneesh Kumar K.V5-2/+93
2016-08-12trace-events: fix first line comment in trace-eventsLaurent Vivier1-1/+1
2016-08-10ppc/kvm: Register also a generic spapr CPU core family typeThomas Huth1-2/+5
2016-08-10ppc/kvm: Do not mess up the generic CPU family registrationThomas Huth1-7/+7
2016-08-10ppc: Introduce a function to look up CPU alias stringsThomas Huth2-0/+14
2016-08-10ppc64: fix compressed dump with pseries kernelLaurent Vivier1-0/+5
2016-07-29ppc: Fix fault PC reporting for lve*/stve* VMX instructionsBenjamin Herrenschmidt1-10/+11
2016-07-25target-ppc: add PPC_MFTB flag to e500mc and e5500Michael Walle1-2/+2
2016-07-25ppc: Huge page detection mechanism fixes - Episode IIIThomas Huth1-13/+14
2016-07-21kvm-irqchip: i386: add hook for add/remove virqPeter Xu1-0/+11
2016-07-18ppc: Yet another fix for the huge page support detection mechanismThomas Huth1-3/+7
2016-07-18target-ppc: fix left shift overflow in hpte_page_shiftPaolo Bonzini1-1/+1
2016-07-18ppc/mmu-hash64: Remove duplicated #include statementThomas Huth1-1/+0
2016-07-18ppc: abort if compat property contains an unknown valueGreg Kurz1-2/+2
2016-07-18ppc: Fix support for odd MSR combinationsBenjamin Herrenschmidt1-24/+22
2016-07-12Clean up ill-advised or unusual header guardsMarkus Armbruster4-12/+12
2016-07-12target-*: Clean up cpu.h header guardsMarkus Armbruster1-3/+4
2016-07-12Use #include "..." for our own headers, <...> for othersMarkus Armbruster1-1/+1
2016-07-12Fix confusing argument names in some common functionsSergey Sorokin1-4/+4
2016-07-05ppc/hash64: Fix support for LPCR:ISLBenjamin Herrenschmidt1-8/+17
2016-07-05ppc/hash64: Add proper real mode translation supportBenjamin Herrenschmidt4-10/+174
2016-07-05target-ppc: Return page shift from PTEG searchDavid Gibson1-25/+8
2016-07-05target-ppc: Simplify HPTE matchingDavid Gibson2-8/+9
2016-07-05target-ppc: Correct page size decoding in ppc_hash64_pteg_search()David Gibson1-58/+41
2016-07-05ppc: simplify ppc_hash64_hpte_page_shift_noslb()Cédric Le Goater2-7/+2
2016-07-05ppc: simplify max_smt initialization in ppc_cpu_realizefn()Greg Kurz1-1/+1
2016-07-05ppc: Fix xsrdpi, xvrdpi and xvrspi roundingAnton Blanchard1-3/+3
2016-07-01target-ppc: gen_pause for instructions: yield, mdoio, mdoom, misoAaron Larson1-7/+8
2016-07-01ppc: Fix 64K pages support in full emulationBenjamin Herrenschmidt3-7/+57
2016-07-01ppc: Print HSRR0/HSRR1 in "info registers"Benjamin Herrenschmidt1-0/+7
2016-07-01ppc: LPCR is a HV resourceBenjamin Herrenschmidt1-4/+5
2016-07-01ppc: Initial HDEC supportBenjamin Herrenschmidt4-10/+54
2016-07-01ppc: Enforce setting MSR:EE,IR and DR when MSR:PR is setBenjamin Herrenschmidt1-0/+4
2016-07-01ppc: Fix conditions for delivering external interrupts to a guestBenjamin Herrenschmidt1-11/+8
2016-07-01ppc: Use a helper to filter writes to LPCRBenjamin Herrenschmidt3-19/+95
2016-07-01ppc: Update LPCR definitionsBenjamin Herrenschmidt1-3/+13
2016-07-01ppc: Add a bunch of hypervisor SPRs to Book3sBenjamin Herrenschmidt1-3/+116
2016-06-29Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into stagingPeter Maydell1-2/+0
2016-06-29target-*: Don't redefine cpu_exec()Peter Crosthwaite1-2/+0
2016-06-24softfloat: Implement run-time-configurable meaning of signaling NaN bitAleksandar Markovic1-59/+61
2016-06-23ppc: Disable huge page support if it is not available for main RAMThomas Huth1-1/+16
2016-06-23ppc: Add P7/P8 Power Management instructionsBenjamin Herrenschmidt6-3/+241
2016-06-23ppc: Move exception generation code out of lineBenjamin Herrenschmidt1-3/+3
2016-06-23ppc: Turn a bunch of booleans from int to boolBenjamin Herrenschmidt1-19/+18
2016-06-23ppc: Add real mode CI load/store instructions for P7 and P8Benjamin Herrenschmidt3-14/+55
2016-06-23ppc: Rework generation of priv and inval interruptsBenjamin Herrenschmidt2-399/+310
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