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AgeCommit message (Expand)AuthorFilesLines
2014-03-13cpu: Turn cpu_handle_mmu_fault() into a CPUClass hookAndreas Färber3-5/+9
2014-03-13cpu: Factor out cpu_generic_init()Andreas Färber1-20/+1
2014-03-13cpu: Turn cpu_has_work() into a CPUClass hookAndreas Färber2-8/+9
2014-03-13target-ppc: Clean up ENV_GET_CPU() usageAndreas Färber3-7/+13
2014-03-05target-ppc: spapr: e500: fix to use cpu_dt_idAlexey Kardashevskiy2-1/+2
2014-03-05target-ppc: add PowerPCCPU::cpu_dt_idAlexey Kardashevskiy5-25/+24
2014-03-05target-ppc: Update ppc_hash64_store_hpte to support updating in-kernel htabAneesh Kumar K.V4-15/+68
2014-03-05target-ppc: Change the hpte store APIAneesh Kumar K.V2-17/+10
2014-03-05target-ppc: Fix page table lookup with kvm enabledAneesh Kumar K.V4-21/+152
2014-03-05target-ppc: Fix htab_mask calculationAneesh Kumar K.V6-9/+18
2014-03-05target-ppc: Use Additional Temporary in stqcx CaseTom Musta1-3/+5
2014-03-05target-ppc: Fix Compiler Warnings Due to 64-Bit Constants Declared as ULTom Musta1-22/+22
2014-03-05target-ppc/translate.c: Use ULL suffix for 64 bit constantsPeter Maydell1-2/+2
2014-03-05target-ppc: Altivec 2.07: Vector Permute and Exclusive ORTom Musta3-1/+21
2014-03-05target-ppc: Altivec 2.07: Vector SHA Sigma InstructionsTom Musta3-0/+108
2014-03-05target-ppc: Altivec 2.07: AES InstructionsTom Musta3-0/+315
2014-03-05target-ppc: Altivec 2.07: Binary Coded Decimal InstructionsTom Musta3-4/+245
2014-03-05target-ppc: Altivec 2.07: Vector Polynomial Multiply SumTom Musta3-0/+82
2014-03-05target-ppc: Altivec 2.07: Vector Gather Bits by BytesTom Musta3-0/+279
2014-03-05target-ppc: Altivec 2.07: Doubleword ComparesTom Musta3-7/+29
2014-03-05target-ppc: Altivec 2.07: vbpermq InstructionTom Musta3-0/+34
2014-03-05target-ppc: Altivec 2.07: Quadword Addition and SubtracationTom Musta3-0/+211
2014-03-05target-ppc: Altivec 2.07: Vector Doubleword Rotate and Shift InstructionsTom Musta3-0/+16
2014-03-05target-ppc: Altivec 2.07: Change Bit Masks to Support 64-bit Rotates and ShiftsTom Musta1-25/+15
2014-03-05target-ppc: Altivec 2.07: Vector Merge InstructionsTom Musta1-0/+37
2014-03-05target-ppc: Altivec 2.07: Unpack Signed Word InstructionsTom Musta3-0/+8
2014-03-05target-ppc: Altivec 2.07: Pack Doubleword InstructionsTom Musta3-0/+16
2014-03-05target-ppc: Altivec 2.07: Vector Min/Max Doubleword InstructionsTom Musta3-0/+14
2014-03-05target-ppc: Altivec 2.07: Vector Population Count InstructionsTom Musta3-4/+36
2014-03-05target-ppc: Altivec 2.07: Add Vector Count Leading ZeroesTom Musta3-0/+43
2014-03-05target-ppc: Altivec 2.07: vmuluw InstructionTom Musta3-1/+6
2014-03-05target-ppc: Altivec 2.07: Multiply Even/Odd Word InstructionsTom Musta3-0/+14
2014-03-05target-ppc: Altivec 2.07: Change VMUL_DO to Support 64-bit IntegersTom Musta1-12/+14
2014-03-05target-ppc: Altivec 2.07: Add/Subtract Unsigned Doubleword ModuloTom Musta3-0/+7
2014-03-05target-ppc: Altivec 2.07: Vector Logical InstructionsTom Musta1-0/+11
2014-03-05target-ppc: Altivec 2.07: Add Support for R-Form Dual InstructionsTom Musta1-0/+35
2014-03-05target-ppc: Altivec 2.07: Add Opcode Macro for VX Form InstructionsTom Musta1-0/+5
2014-03-05target-ppc: Altivec 2.07: Add Support for Dual Altivec InstructionsTom Musta1-0/+24
2014-03-05target-ppc: Altivec 2.07: Add GEN_VXFORM3Tom Musta1-0/+19
2014-03-05target-ppc: Altivec 2.07: Update AVR StructureTom Musta1-0/+4
2014-03-05target-ppc: Altivec 2.07: Add Instruction FlagTom Musta2-2/+5
2014-03-05target-ppc: Add Store Quadword ConditionalTom Musta1-0/+21
2014-03-05target-ppc: Add Load Quadword and ReserveTom Musta2-0/+38
2014-03-05target-ppc: Store QuadwordTom Musta1-16/+23
2014-03-05target-ppc: Load QuadwordTom Musta2-15/+23
2014-03-05target-ppc: Add is_user_mode Utility RoutineTom Musta1-0/+14
2014-03-05target-ppc: Add Flag for ISA 2.07 Load/Store Quadword InstructionsTom Musta2-2/+5
2014-03-05target-ppc: Add bctar InstructionTom Musta1-1/+10
2014-03-05target-ppc: Add Target Address SPR (TAR) to Power8Tom Musta2-1/+14
2014-03-05target-ppc: Add Flag for bctarTom Musta2-3/+5
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