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path: root/target-ppc/mmu_helper.c
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2013-02-01target-ppc: Fix target_ulong vs. hwaddr format mismatchesAndreas Färber1-3/+3
Since HWADDR_PRIx is always the same now, use %016 for TARGET_PPC64 and %08 for common code. This may slightly change the ppc64 debug output. Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2013-02-01target-ppc: Fix unused variable warning for FLUSH_ALL_TLBSAndreas Färber1-1/+2
Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Alexander Graf <agraf@suse.de>
2012-12-19softmmu: move include files to include/sysemu/Paolo Bonzini1-1/+1
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2012-11-01target-ppc: make some functions staticBlue Swirl1-5/+6
Signed-off-by: Blue Swirl <blauwirbel@gmail.com> Acked-by: Alexander Graf <agraf@suse.de> Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2012-10-29Drop unnecessary check of TARGET_PHYS_ADDR_SPACE_BITSPeter Maydell1-2/+0
For all our PPC targets the physical address space is at least 36 bits, so drop an unnecessary preprocessor conditional check on TARGET_PHYS_ADDR_SPACE_BITS (erroneously introduced as part of the change from target_phys_addr_t to hwaddr). This brings this bit of code into line with the way we handle the other cases which were originally checking TARGET_PHYS_ADDR_BITS in order to avoid compiler complaints about overflowing a 32 bit type. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Alexander Graf <agraf@suse.de>
2012-10-23Rename target_phys_addr_t to hwaddrAvi Kivity1-26/+26
target_phys_addr_t is unwieldly, violates the C standard (_t suffixes are reserved) and its purpose doesn't match the name (most target_phys_addr_t addresses are not target specific). Replace it with a finger-friendly, standards conformant hwaddr. Outstanding patchsets can be fixed up with the command git rebase -i --exec 'find -name "*.[ch]" | xargs s/target_phys_addr_t/hwaddr/g' origin Signed-off-by: Avi Kivity <avi@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-10-04Make target_phys_addr_t 64 bits unconditionallyAvi Kivity1-3/+1
The hassle and compile time overhead of maintaining both 32-bit and 64-bit capable source isn't worth the tiny performance advantage which is seen on a minority of configurations. Switch to compiling libhw only once, with target_phys_addr_t unconditionally typedefed to uint64_t. Signed-off-by: Avi Kivity <avi@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-06-24ppc64: Rudimentary Support for extra page sizes on server CPUsBenjamin Herrenschmidt1-0/+7
More recent Power server chips (i.e. based on the 64 bit hash MMU) support more than just the traditional 4k and 16M page sizes. This can get quite complicated, because which page sizes are supported, which combinations are supported within an MMU segment and how these page sizes are encoded both in the SLB entry and the hash PTE can vary depending on the CPU model (they are not specified by the architecture). In addition the firmware or hypervisor may not permit use of certain page sizes, for various reasons. Whether various page sizes are supported on KVM, for example, depends on whether the PR or HV variant of KVM is in use, and on the page size of the memory backing the guest's RAM. This patch adds information to the CPUState and cpu defs to describe the supported page sizes and encodings. Since TCG does not yet support any extended page sizes, we just set this to NULL in the static CPU definitions, expanding this to the default 4k and 16M page sizes when we initialize the cpu state. When using KVM, however, we instead determine available page sizes using the new KVM_PPC_GET_SMMU_INFO call. For old kernels without that call, we use some defaults, with some guesswork which should do the right thing for existing HV and PR implementations. The fallback might not be correct for future versions, but that's ok, because they'll have KVM_PPC_GET_SMMU_INFO. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Alexander Graf <agraf@suse.de>
2012-06-24booke_206_tlbwe: Discard invalid bits in MAS2Fabien Chouteau1-2/+15
The size of EPN field in MAS2 depends on page size. This patch adds a mask to discard invalid bits in EPN field. Definition of EPN field from e500v2 RM: EPN Effective page number: Depending on page size, only the bits associated with a page boundary are valid. Bits that represent offsets within a page are ignored and should be cleared. There is a similar (but more complicated) definition in PowerISA V2.06. Signed-off-by: Fabien Chouteau <chouteau@adacore.com> Signed-off-by: Alexander Graf <agraf@suse.de>
2012-06-24ppc: Cleanup MMU mergeBlue Swirl1-85/+35
Remove useless wrappers. In some cases 'int' parameters are changed to uint32_t. Make internal functions static. Signed-off-by: Blue Swirl <blauwirbel@gmail.com> [agraf: fix kvm compilation] Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Alexander Graf <agraf@suse.de>
2012-06-24ppc: Move MMU helpers from helper.c to mmu_helper.cBlue Swirl1-0/+2471
Move more MMU helpers from helper.c to mmu_helper.c. Signed-off-by: Blue Swirl <blauwirbel@gmail.com> Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Andreas Färber <afaerber@suse.de> [update to current helper.c state] Signed-off-by: Alexander Graf <agraf@suse.de>
2012-06-24ppc: Avoid a warning with the next patchBlue Swirl1-2/+2
When the code is moved together by the next patch, compiler detects a possible uninitialized variable use. Avoid the warning by initializing the variables. Signed-off-by: Blue Swirl <blauwirbel@gmail.com> Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Alexander Graf <agraf@suse.de>
2012-06-24ppc: Avoid AREG0 for MMU etc. helpersBlue Swirl1-44/+47
Add an explicit CPUPPCState parameter instead of relying on AREG0. Signed-off-by: Blue Swirl <blauwirbel@gmail.com> Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Alexander Graf <agraf@suse.de>
2012-06-24ppc: Split MMU etc. helpers from op_helper.cBlue Swirl1-0/+882
Move MMU, TLB, SLB and BAT ops to mmu_helper.c. Signed-off-by: Blue Swirl <blauwirbel@gmail.com> Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Alexander Graf <agraf@suse.de>
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