index
:
sdk/emulator/qemu
1.0_post
2.0alpha
features/brillcodec_2i
features/camera
features/cnp
features/dr
features/qt_dr
features/smp
features/virtio-9p
features/vmodem
glesv3
master
opensrc_p2.3
opensrc_p2.3.1
opensrc_p2.3.2
opensrc_p2.4
opensrc_p3.0
opensrc_p4.0
sandbox/byungchul.so/tizen
sandbox/elebideau/tizen
sandbox/mmajewski2/maru-virgl-rendering-wip
sandbox/mmajewski2/standalone-virgl-wip
sandbox/pcoval/tizen
spin
tizen
tizen_2.0
tizen_2.1
tizen_2.2
tizen_3.0.m14.4_ivi
tizen_p2.3
tizen_p2.3.1
tizen_qemu_1.6
tizen_qemu_1.7
tizen_qemu_2.0
tizen_qemu_5.0.1
tizen_studio_1.2_p2.3
tizen_studio_1.2_p2.3.1
tizen_studio_1.2_p2.3.2
tizen_studio_1.2_p2.4
tizen_studio_1.2_p3.0
tizen_studio_1.3_p2.3
tizen_studio_1.3_p2.3.1
tizen_studio_1.3_p2.3.2
tizen_studio_1.3_p2.4
tizen_studio_1.3_p3.0
tizen_studio_2.0_p2.3
tizen_studio_2.0_p2.3.1
tizen_studio_2.0_p2.3.2
tizen_studio_2.0_p2.4
tizen_studio_2.0_p3.0
tizen_studio_2.0_p4.0
tizen_studio_2.0_p5.0
tizen_studio_3.0_p2.3
tizen_studio_3.0_p2.3.1
tizen_studio_3.0_p2.3.2
tizen_studio_3.0_p2.4
tizen_studio_3.0_p3.0
tizen_studio_3.0_p4.0
tizen_studio_3.0_p5.0
tizen_studio_3.5_p2.3
tizen_studio_3.5_p2.3.1
tizen_studio_3.5_p2.3.2
tizen_studio_3.5_p2.4
tizen_studio_3.5_p3.0
tizen_studio_3.5_p4.0
tizen_studio_3.5_p5.0
tizen_studio_3.5_p5.5
tizen_studio_4.0_p2.3
tizen_studio_4.0_p2.3.1
tizen_studio_4.0_p2.3.2
tizen_studio_4.0_p2.4
tizen_studio_4.0_p3.0
tizen_studio_4.0_p4.0
tizen_studio_4.0_p5.0
tizen_studio_4.0_p5.5
tizen_studio_4.0_p6.0
tizen_studio_4.5_p6.5
tizen_studio_5.0_p7.0
tizen_studio_5.5_p7.5
tizen_studio_5.5_p8.0
tizen_studio_6.0_p9.0
tizen_studio_p2.3
tizen_studio_p2.3.1
tizen_studio_p2.3.2
tizen_studio_p2.4
tizen_studio_p3.0
tizen_studio_p4.0
works/arg_renewal
Domain: SDK / Emulator;
summary
refs
log
tree
commit
diff
log msg
author
committer
range
path:
root
/
target-mips
Age
Commit message (
Expand
)
Author
Files
Lines
2012-09-08
MIPS/user: Fix reset CPU state initialization
Maciej W. Rozycki
3
-62
/
+52
2012-08-27
target-mips: allow microMIPS SWP and SDP to have RD equal to BASE
Eric Johnson
1
-1
/
+9
2012-08-27
target-mips: add privilege level check to several Cop0 instructions
Eric Johnson
1
-0
/
+9
2012-08-27
mips-linux-user: Always support rdhwr.
Richard Henderson
1
-0
/
+4
2012-08-27
target-mips: Streamline indexed cp1 memory addressing.
Richard Henderson
1
-2
/
+1
2012-08-27
Fix order of CVT.PS.S operands
Richard Sandiford
1
-1
/
+1
2012-08-27
Fix operands of RECIP2.S and RECIP2.PS
Richard Sandiford
1
-2
/
+2
2012-08-24
target-mips: Fix some helper functions (VR54xx multiplication)
Stefan Weil
1
-46
/
+29
2012-08-23
target-mips: Enable access to required RDHWR hardware registers
Meador Inge
1
-2
/
+3
2012-08-09
MIPS: Correct FCR0 initialization
Nathan Froyd
1
-0
/
+1
2012-06-07
build: move other target-*/ objects to nested Makefile.objs
Paolo Bonzini
1
-1
/
+2
2012-06-07
build: move libobj-y variable to nested Makefile.objs
Paolo Bonzini
1
-1
/
+3
2012-06-07
build: move obj-TARGET-y variables to nested Makefile.objs
Paolo Bonzini
1
-0
/
+1
2012-06-04
Kill off cpu_state_reset()
Andreas Färber
1
-0
/
+3
2012-06-04
target-mips: Let cpu_mips_init() return MIPSCPU
Andreas Färber
2
-4
/
+12
2012-06-04
target-mips: Use cpu_reset() in do_interrupt()
Andreas Färber
1
-1
/
+2
2012-06-04
target-mips: Use cpu_reset() in cpu_mips_init()
Andreas Färber
1
-1
/
+1
2012-05-19
mips: Fix BC1ANY[24]F instructions
Richard Sandiford
1
-4
/
+4
2012-05-12
target-mips: Remove commented-out function declaration
Andreas Färber
1
-1
/
+0
2012-05-03
target-mips: Remove unused inline function
Stefan Weil
1
-6
/
+0
2012-05-01
Merge branch 'qom-cpu-rest.v1' of git://github.com/afaerber/qemu-cpu
Blue Swirl
4
-2
/
+148
2012-04-30
target-mips: Start QOM'ifying CPU init
Andreas Färber
2
-1
/
+9
2012-04-30
target-mips: QOM'ify CPU
Andreas Färber
4
-1
/
+139
2012-04-28
target-mips: Move definition of uint_fast{8, 16}_t to osdep.h
Andreas Färber
1
-7
/
+0
2012-04-15
target-mips: Fix type cast for w64 (uintptr_t)
Stefan Weil
1
-1
/
+1
2012-04-14
Use uintptr_t for various op related functions
Blue Swirl
1
-10
/
+8
2012-04-07
Replace Qemu by QEMU in comments
Stefan Weil
1
-1
/
+1
2012-04-07
Replace Qemu by QEMU in internal documentation
Stefan Weil
1
-2
/
+2
2012-03-24
target-mips: Add compiler attribute to some functions which don't return
Stefan Weil
2
-3
/
+4
2012-03-14
Rename CPUState -> CPUArchState
Andreas Färber
1
-1
/
+1
2012-03-14
target-mips: Don't overuse CPUState
Andreas Färber
5
-274
/
+274
2012-03-14
Rename cpu_reset() to cpu_state_reset()
Andreas Färber
2
-3
/
+3
2012-03-08
Spelling fixes in comments (it's -> its)
Stefan Weil
1
-1
/
+1
2012-02-28
target-mips: Clean includes
Stefan Weil
1
-7
/
+0
2011-12-14
Fix spelling in comments, documentation and messages
Stefan Weil
1
-1
/
+1
2011-12-02
fix spelling in target sub directory
Dong Xu Wang
2
-2
/
+2
2011-10-01
softmmu_header: pass CPUState to tlb_fill
Blue Swirl
1
-4
/
+3
2011-09-06
mips: Support the MT TCStatus IXMT irq disable flag
Edgar E. Iglesias
1
-0
/
+4
2011-09-06
mips: Add MT halting and waking of VPEs
Edgar E. Iglesias
2
-4
/
+129
2011-09-06
mips: Initialize MT state at reset
Edgar E. Iglesias
1
-0
/
+26
2011-09-06
mips: Default to using one VPE and one TC.
Edgar E. Iglesias
1
-1
/
+1
2011-09-06
mips: Enable VInt interrupt mode for the 34Kf
Edgar E. Iglesias
1
-1
/
+1
2011-09-06
mips: Correct VInt vector generation
Edgar E. Iglesias
1
-3
/
+3
2011-09-06
mips: Correct IntCtl write mask for VInt
Edgar E. Iglesias
1
-1
/
+1
2011-09-06
mips: Hook in more reg accesses via mttr/mftr
Edgar E. Iglesias
3
-11
/
+225
2011-09-06
mips: Synchronize CP0 TCSTatus, Status and EntryHi
Edgar E. Iglesias
1
-44
/
+106
2011-09-06
mips: Handle TC indexing of other VPEs
Edgar E. Iglesias
1
-105
/
+161
2011-08-20
Use glib memory allocation and free functions
Anthony Liguori
2
-3
/
+3
2011-08-07
Remove unused is_softmmu parameter from cpu_handle_mmu_fault
Blue Swirl
3
-5
/
+5
2011-07-30
exec.h cleanup
Blue Swirl
3
-61
/
+57
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