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AgeCommit message (Expand)AuthorFilesLines
2010-03-04target-mips: use newer logical opsAurelien Jarno1-8/+4
2010-03-02target-mips: use setcond when possibleAurelien Jarno1-77/+20
2010-02-23target-mips: fix ROTR and DROTR by zeroNathan Froyd1-0/+4
2010-02-23target-mips: fix CpU exception for coprocessor 0Nathan Froyd1-1/+1
2010-02-23target-mips: remove useless sign extensionAurelien Jarno1-2/+0
2010-02-06target-mips: don't call cpu_loop_exit() from helper.cAurelien Jarno3-8/+22
2010-01-19kill regs_to_env and env_to_regsPaolo Bonzini1-8/+0
2009-12-17target-mips: No MIPS16 support for 4Kc, 4KEc coresStefan Weil1-3/+3
2009-12-16target-mips: 4Kc, 4KEc cores do not support MIPS16Stefan Weil1-3/+3
2009-12-13target-mips: fix user-mode emulation startupNathan Froyd2-8/+8
2009-12-13target-mips: set Config1.CA for MIPS16-aware CPUsNathan Froyd1-9/+18
2009-12-13target-mips: add copyright notice for mips16 workNathan Froyd2-1/+1
2009-12-13target-mips: add mips16 instruction decodingNathan Froyd1-9/+1063
2009-12-13target-mips: add enums for MIPS16 opcodesNathan Froyd1-0/+112
2009-12-13target-mips: split out delay slot handlingNathan Froyd1-55/+79
2009-12-13target-mips: add gen_base_offset_addrNathan Froyd1-24/+16
2009-12-13target-mips: make gen_compute_branch 16/32-bit-awareNathan Froyd1-7/+8
2009-12-13target-mips: move ROTR and ROTRV inside gen_shift_{imm, }Nathan Froyd1-139/+148
2009-12-13target-mips: change interrupt bits to be mips16-awareNathan Froyd2-24/+44
2009-12-13target-mips: add new HFLAGs for JALX and 16/32-bit delay slotsNathan Froyd1-19/+28
2009-11-30target-mips: use physical address in lladdrAurelien Jarno3-28/+61
2009-11-30target-mips: add a function to do virtual -> physical translationsAurelien Jarno2-0/+25
2009-11-30target-mips: split code raising MMU exception in a separate functionAurelien Jarno1-46/+53
2009-11-30target-mips: factorize load/store code in op_helper.cAurelien Jarno1-152/+100
2009-11-22target-mips: fix physical address type in MMU functionsAurelien Jarno2-11/+11
2009-11-22target-mips: make CP0_LLAddr register CPU dependentAurelien Jarno5-4/+49
2009-11-22target-mips: rename CP0_LLAddr into lladdrAurelien Jarno4-16/+16
2009-11-14target-mips: fix indentationAurelien Jarno2-3/+3
2009-11-14mips: fix cpu_reset memory leakBlue Swirl3-56/+54
2009-10-01Revert "Get rid of _t suffix"Anthony Liguori5-27/+28
2009-10-01Get rid of _t suffixmalc5-28/+27
2009-09-30target-mips: make sure constants are in the second argumentAurelien Jarno1-7/+7
2009-09-30mips: Fix spelling in commentStefan Weil1-2/+2
2009-09-30target-mips: unmatched brackets in if 0Michael S. Tsirkin1-1/+0
2009-09-28target-mips: log instructions start in TCG codeAurelien Jarno1-0/+4
2009-09-23target-mips: remove MAX_OP_PER_INSTR workaroundAurelien Jarno1-2/+1
2009-09-21Add 'static' to please SparseBlue Swirl1-1/+1
2009-09-14target-mips: fix single-steppingNathan Froyd1-3/+18
2009-09-12Fix sys-queue.h conflict for goodBlue Swirl1-2/+2
2009-08-25target-mips: fix conditional moves off fp condition codesNathan Froyd1-5/+5
2009-08-24cleanup cpu-exec.c, part 0/N: consolidate handle_cpu_signalNathan Froyd1-0/+1
2009-07-27rename WORDS_BIGENDIAN to HOST_WORDS_BIGENDIANJuan Quintela1-1/+1
2009-07-27change HOST_SOLARIS to CONFIG_SOLARIS{_VERSION}Juan Quintela1-1/+1
2009-07-16Update to a hopefully more future proof FSF addressBlue Swirl4-8/+4
2009-07-12target-mips: remove useless code in gen_st_cond()Aurelien Jarno1-1/+0
2009-07-12Fix MIPS SCPaul Brook1-2/+2
2009-07-09MIPS atomic instructionsPaul Brook2-24/+64
2009-07-09MIPS usermode TLS registerPaul Brook1-0/+5
2009-07-03target-mips: fix MADD and MSUB/MSUBU instructionsNathan Froyd1-3/+3
2009-06-13Fix a warning: uint_fast8_t is not 8 bits on OpenBSD/Sparc64Blue Swirl1-2/+6
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