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path: root/target-mips/op_helper.c
AgeCommit message (Expand)AuthorFilesLines
2009-12-13target-mips: change interrupt bits to be mips16-awareNathan Froyd1-3/+14
2009-11-30target-mips: use physical address in lladdrAurelien Jarno1-0/+39
2009-11-30target-mips: factorize load/store code in op_helper.cAurelien Jarno1-152/+100
2009-11-22target-mips: make CP0_LLAddr register CPU dependentAurelien Jarno1-2/+9
2009-11-22target-mips: rename CP0_LLAddr into lladdrAurelien Jarno1-7/+7
2009-11-14target-mips: fix indentationAurelien Jarno1-1/+1
2009-10-01Revert "Get rid of _t suffix"Anthony Liguori1-4/+4
2009-10-01Get rid of _t suffixmalc1-4/+4
2009-09-21Add 'static' to please SparseBlue Swirl1-1/+1
2009-07-16Update to a hopefully more future proof FSF addressBlue Swirl1-2/+1
2009-04-15target-mips: variable names consistencyaurel321-364/+364
2009-03-28target-mips: implement FPU Flush-To-Zero modeaurel321-0/+5
2009-03-08target-mips: remove dead codeaurel321-34/+0
2009-03-08target-mips: rename helpers from do_ to helper_aurel321-270/+261
2009-01-15global s/loglevel & X/qemu_loglevel_mask(X)/ (Eduardo Habkost)aliguori1-3/+3
2009-01-15Convert references to logfile/loglevel to use qemu_log*() macrosaliguori1-33/+33
2009-01-14target-mips: fix indentationaurel321-11/+11
2009-01-04Update FSF address in GPL/LGPL boilerplateaurel321-1/+1
2008-12-20Fix remaining compiler warnings for mips targets.ths1-2/+4
2008-12-07MIPS: remove a few warningsaurel321-4/+4
2008-11-17TCG variable type checking.pbrook1-0/+21
2008-11-11target-mips: convert bit shuffle ops to TCGaurel321-19/+0
2008-11-11target-mips: convert bitfield ops to TCGaurel321-25/+1
2008-11-11target-mips: fix mft* helpers/callaurel321-5/+5
2008-10-06Show size for unassigned accesses (Robert Reif)blueswir11-1/+1
2008-09-18Move the active FPU registers into env again, and use more TCG registersths1-261/+261
2008-09-14MIPS: Fix tlbwi/tlbwraurel321-3/+9
2008-07-23Use plain standard inline.ths1-7/+7
2008-07-23Less hardcoding of TARGET_USER_ONLY.ths1-93/+2
2008-07-09Use temporary registers for the MIPS FPU emulation.ths1-368/+612
2008-06-29Remove unnecessary helper arguments, and fix some typos.ths1-5/+5
2008-06-27Avoid unused input arguments which triggered tcg errors. Spotted byths1-16/+18
2008-06-27More efficient target register / TC accesses.ths1-80/+188
2008-06-24Remove remaining uses of T0 in the MIPS target.ths1-34/+35
2008-06-24Use temporaries instead of fixed registers for some instructions.ths1-6/+6
2008-06-23Pass T0/T1 explicitly to helper functions, and clean up a few dyngenths1-549/+514
2008-06-20Convert unaligned load/store to TCG.ths1-0/+337
2008-06-20Convert vr54xx multiply instructions to TCG.ths1-3/+3
2008-06-19Convert remaining MIPS FP instructions to TCG.ths1-0/+87
2008-06-12Switch the standard multiplication instructions to TCG.ths1-10/+12
2008-06-12Switch bitfield instructions and assorted special ops to TCG.ths1-0/+123
2008-06-12TCGify a few more instructions.ths1-0/+6
2008-06-09Switch remaining CP0 instructions to TCG or helper functions.ths1-4/+788
2008-05-25Fix off-by-one unwinding error.pbrook1-6/+0
2008-05-23Fix build failure for MIPS64 targets on 64-bit hosts.ths1-1/+2
2008-05-21Switch MIPS clo/clz and the condition tests to TCG.ths1-0/+10
2008-05-18Switch most MIPS logical and arithmetic instructions to TCG.ths1-50/+12
2008-05-10fixed do_restore_state()bellard1-5/+7
2008-02-12Make MIPS MT implementation more cache friendly.ths1-20/+20
2008-01-08Fix broken absoluteness check for cabs.d.*.ths1-2/+2
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