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AgeCommit message (Expand)AuthorFilesLines
2008-08-18i386: Catch all non-present ptes in cpu_get_phys_page_debug (Jan Kiszka)aliguori1-0/+2
2008-07-23Fix task register type after reset (Avi Kivity)aliguori1-1/+1
2008-07-18Small cleanup of gen_intermediate_code(_internal), by Laurent Desnogues.ths1-8/+7
2008-07-07fix cvtsq2s[sd] (Juergen Lock)bellard1-2/+6
2008-07-05Re-add static qualifier. Fix annother occurance of "const static".pbrook1-1/+1
2008-07-03Fix constant truncation, spotted by Jindrich Makovicka.ths1-3/+3
2008-07-01Move interrupt_request and user_mode_only to common cpu state.pbrook2-6/+5
2008-06-30Fix rdtsc instruction counting.pbrook1-0/+6
2008-06-30Move CPU save/load registration to common code.pbrook1-0/+2
2008-06-29Add instruction counter.pbrook2-4/+63
2008-06-20added model_id and vendor cpu model options (initial patch by Dan Kenigsberg)...bellard1-11/+29
2008-06-20cmpxchg fixesbellard1-0/+7
2008-06-18HLT, MWAIT and MONITOR insn fixes (initial patch by Alexander Graf)bellard3-11/+21
2008-06-09SVM: Fix segment attribute clobbering (Alexander Graf)bellard1-1/+1
2008-06-06undocumented 0x82 opcode is invalid in 64 bit codebellard1-1/+3
2008-06-06Fix i386 segment descriptor types on reset (Avi Kivity)bellard1-9/+15
2008-06-04save more CPU statebellard2-6/+38
2008-06-04SVM: added tsc_offsetbellard2-4/+8
2008-06-04fixed exceptions for cpuid and invlpgbellard1-0/+6
2008-06-04GIF flag handling fix (Alexander Graf)bellard1-2/+2
2008-06-04reworked SVM interrupt handling logic - fixed vmrun EIP saved value - reworke...bellard6-65/+65
2008-06-0432 bit SVM fixes - INVLPG and INVLPGA updatesbellard4-25/+47
2008-06-04EFER loading fixes, including SVME bitbellard3-27/+24
2008-06-03Spelling fixes, by Stefan Weil.ths2-5/+5
2008-05-30kqemu API change - allow use of kqemu with 32 bit QEMU on a 64 bit hostbellard1-11/+21
2008-05-30Fix typo.pbrook1-1/+1
2008-05-30Move clone() register setup to target specific code. Handle fork-like clone.pbrook1-0/+9
2008-05-29Push common interrupt variables to cpu-defs.h (Glauber Costa)bellard1-2/+0
2008-05-28moved halted field to CPU_COMMONbellard4-8/+6
2008-05-28force bit 1 in eflags loadbellard1-1/+1
2008-05-28SVM reworkbellard7-477/+383
2008-05-28consistent naming for i386 TCG helper filebellard3-6396/+6396
2008-05-28variable dynamic translation buffer sizebellard1-0/+2
2008-05-25fixed x86_64 regressionbellard1-4/+4
2008-05-25transformed TN into temporaries - add local temporaries usage when needed - o...bellard4-266/+259
2008-05-25Fix off-by-one unwinding error.pbrook1-5/+0
2008-05-24Fix A20 debug dumps.pbrook1-2/+2
2008-05-24Fix ARM conditional branch bug.pbrook1-28/+25
2008-05-22use debug_insn_start to have nicer debug tracesbellard1-5/+2
2008-05-22proper helper definition registering (all targets must do that)bellard3-353/+361
2008-05-22optimization of shifts by a constantbellard1-4/+68
2008-05-22lahf/sahf cpuid testbellard2-9/+6
2008-05-22cmpxchg8b fix - added cmpxchg16bbellard3-7/+47
2008-05-22cmpxchg 64 bit fixbellard1-4/+10
2008-05-22fxsave/fxrstor 64 bit fixbellard1-2/+20
2008-05-21converted conditional jumps, SET and CMOVx to TCGbellard4-840/+421
2008-05-21converted env access to TCGbellard2-67/+32
2008-05-21convert eflags manipulation insns to TCGbellard5-148/+46
2008-05-21convert remaining segment handling to TCGbellard3-49/+38
2008-05-21converted LSL/LAR/VERW/VERR to TCG - force 16 bit memory access for LSL/LARbellard4-61/+39
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