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2011-06-19kvm: x86: Save/restore FPU OP, IP and DPJan Kiszka3-5/+42
These FPU states are properly maintained by KVM but not yet by TCG. So far we unconditionally set them to 0 in the guest which may cause state corruptions, though not with modern guests. To avoid breaking backward migration, use a conditional subsection that is only written if any of the three fields is non-zero. The guest's FNINIT clears them frequently, and cleared IA32_MISC_ENABLE MSR[2] reduces the probability of non-zero values further so that this subsection is not expected to restrict migration in any common scenario. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Avi Kivity <avi@redhat.com>
2011-06-14kvm: Enable CPU SMEP featureYang, Wei Y1-0/+13
This patchset enables a new CPU feature SMEP (Supervisor Mode Execution Protection) in QEMU-KVM. SMEP prevents kernel from executing code in application. Updated Intel SDM describes this CPU feature. The document will be published soon. SMEP is identified by CPUID leaf 7 EBX[7], which is 0 before. Get the right value by query KVM kernel module, so that guest can get SMEP through CPUID. Signed-off-by: Yang, Wei <wei.y.yang@intel.com> Singed-off-by: Shan, Haitao <haitao.shan@intel.com> Singed-off-by: Li, Xin <xin.li@intel.com> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
2011-06-14kvm: Add CPUID support for VIA CPUbrillywu@viatech.com.cn3-3/+74
When KVM is running on VIA CPU with host cpu's model, the feautures of VIA CPU will be passed into kvm guest by calling the CPUID instruction for Centaur. Signed-off-by: BrillyWu<brillywu@viatech.com.cn> Signed-off-by: KaryJin<karyjin@viatech.com.cn> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
2011-06-08target-i386: Make x86 mfence and lfence illegal without SSE2Martin Simmons1-1/+1
While trying to use qemu -cpu pentium3 to test for incorrect uses of certain SSE2 instructions, I found that QEMU allowed the mfence and lfence instructions to be executed even though Pentium 3 doesn't support them. According to the processor specs (and experience on a real Pentium 3), these instructions are only available with SSE2, but QEMU is checking for SSE. The check for the related sfence instruction is correct (it works with SSE). This trival patch fixes the test. Signed-off-by: Martin Simmons <martin@lispworks.com> Signed-off-by: Stefan Hajnoczi <stefanha@linux.vnet.ibm.com>
2011-06-08Fix compilation warning due to missing header for sigaction (followup)Alexandre Raymond1-1/+0
This patch removes all references to signal.h when qemu-common.h is included as they become redundant. Signed-off-by: Alexandre Raymond <cerbere@gmail.com> Signed-off-by: Stefan Hajnoczi <stefanha@linux.vnet.ibm.com>
2011-06-03target-i386: use floatx80 constants in helper_fld*_ST0()Aurelien Jarno1-19/+8
Instead of using a table which doesn't correspond to anything from physical in the CPU, use directly the constants in helper_fld*_ST0(). Cc: Andreas Färber <andreas.faerber@web.de> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-06-03target-i386: remove old code handling float64Aurelien Jarno5-411/+115
Now that target-i386 uses softfloat, floatx80 is always available and there is no need anymore to have code handling both float64 and floax80. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-05-08irq: Privatize CPU_INTERRUPT_NMI.Richard Henderson1-0/+1
This interrupt name is used by i386, CRIS, and MicroBlaze. Copy the name into each target. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-05-08target-i386: Privatize some i386-specific interrupt names.Richard Henderson1-0/+8
SMI, VIRQ, INIT, SIPI, and MCE are all only used by the i386 port. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-05-02kvm: use qemu_free consistentlyPaolo Bonzini1-1/+1
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
2011-05-02kvm: add kvmclock to its second bitGlauber Costa1-1/+1
We have two bits that can represent kvmclock in cpuid. They signal the guest which msr set to use. When we tweak flags involving this value - specially when we use "-", we have to act on both. Signed-off-by: Glauber Costa <glommer@redhat.com> Signed-off-by: Avi Kivity <avi@redhat.com>
2011-05-02x86: Allow multiple cpu feature matches of lookup_featureJan Kiszka1-6/+8
kvmclock is represented by two feature bits. Therefore, lookup_feature needs to continue its search even after the first match. Enhance it accordingly and switch to a bool return type at this chance. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
2011-05-02kvm: use kernel-provided para_features instead of statically coming up with ↵Glauber Costa1-29/+49
new capabilities Use the features provided by KVM_GET_SUPPORTED_CPUID directly to mask out features from guest-visible cpuid. The old get_para_features() mechanism is kept for older kernels that do not implement it. Signed-off-by: Glauber Costa <glommer@redhat.com> Signed-off-by: Avi Kivity <avi@redhat.com>
2011-04-25target-i386: fix constants wrt softfloatAurelien Jarno2-7/+25
Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-04-25target-i386: fix helper_fprem() and helper_fprem1() wrt softfloatAurelien Jarno1-20/+28
Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-04-25target-i386: fix logarithmic and trigonometric helpers wrt softfloatAurelien Jarno1-26/+26
Use the new CPU86_LDouble <-> double conversion functions to make logarithmic and trigonometric helpers working with softfloat. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-04-25target-i386: add CPU86_LDouble <-> double conversion functionsAurelien Jarno1-0/+22
Add functions to convert CPU86_LDouble to double and vice versa. They are going to be used to implement logarithmic and trigonometric function until softfloat implement them. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-04-25target-i386: replace approx_rsqrt and approx_rcp by softfloat opsAurelien Jarno2-22/+24
Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-04-25target-i386: fix helper_fsqrt() wrt softfloatAurelien Jarno2-5/+6
Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-04-25target-i386: fix helper_fdiv() wrt softfloatAurelien Jarno2-2/+7
Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-04-25target-i386: fix helper_fxtract() wrt softfloatAurelien Jarno1-7/+16
With softfloat it's not possible to play with the overflow of an unsigned value to get the 0 case partially correct. Use a special case for that. Using a division to generate an infinity is the easiest way that works for both softfloat and softfloat-native. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-04-25target-i386: fix helper_fbld_ST0() wrt softfloatAurelien Jarno1-3/+4
Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-04-25target-i386: fix helper_fscale() wrt softfloatAurelien Jarno2-1/+10
Use the scalbn softfloat function to implement helper_fscale(). This fixes corner cases (e.g. NaN) and makes a few more GNU libc math tests to pass. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-04-20Remove unused function parameter from cpu_restore_stateStefan Weil1-1/+1
The previous patch removed the need for parameter puc. Is is now unused, so remove it. Cc: Aurelien Jarno <aurelien@aurel32.net> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Stefan Weil <weil@mail.berlios.de>
2011-04-20Remove unused function parameters from gen_pc_load and rename the functionStefan Weil1-4/+3
Function gen_pc_load was introduced in commit d2856f1ad4c259e5766847c49acbb4e390731bd4. The only reason for parameter searched_pc was a debug statement in target-i386/translate.c. Parameter puc was needed by target-sparc until commit d7da2a10402f1644128b66414ca8f86bdea9ae7c. Remove searched_pc from the debug statement and remove both parameters from the parameter list of gen_pc_load. As the function name gen_pc_load was also misleading, it is now called restore_state_to_opc. This new name was suggested by Peter Maydell, thanks. v2: Remove last parameter, too, and rename the function. v3: Fix [] typo in target-arm/translate.c. Fix wrong SHA1 object name in commit message (copy+paste error). Cc: Aurelien Jarno <aurelien@aurel32.net> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Stefan Weil <weil@mail.berlios.de>
2011-04-17softfloat: rename float*_eq() into float*_eq_quiet()Aurelien Jarno1-4/+4
float*_eq functions have a different semantics than other comparison functions. Fix that by first renaming float*_quiet() into float*_eq_quiet(). Note that it is purely mechanical, and the behaviour should be unchanged. That said it clearly highlight problems due to this different semantics, they are fixed later in this patch series. Cc: Alexander Graf <agraf@suse.de> Acked-by: Edgar E. Iglesias <edgar.iglesias@gmail.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-04-17target-i386: fix CMPUNORDPS/D and CMPORDPS/D instructionsAurelien Jarno1-2/+2
SSE instructions CMPUNORDPS/D and CMPORDPS/D do not trigger an invalid exception if operands are qNANs. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-04-17target-i386: add floatx_{add,mul,sub} and use themAurelien Jarno2-10/+14
Add floatx_{add,mul,sub} defines, and use them instead of using direct C operations. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-04-17target-i386: use float unions from cpu-all.hAurelien Jarno1-25/+2
Use float unions from cpu-all.h instead of redefining new (wrong for arm) ones in target-i386. This also allows building cpu-exec.o with softfloat. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-04-17target-i386: use CPU_LDoubleU instead of a private unionAurelien Jarno1-9/+3
Use CPU_LDoubleU in cpu_dump_state() instead of redefining a union for doing the conversion. Based on a patch from Laurent Vivier <laurent@vivier.eu>. Cc: Laurent Vivier <laurent@vivier.eu> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-04-10Fix conversions from pointer to tcg_target_longStefan Weil1-1/+1
tcg_gen_exit_tb takes a parameter of type tcg_target_long, so the type casts of pointer to long should be replaced by type casts of pointer to tcg_target_long (suggested by Blue Swirl). These changes are needed for build environments where sizeof(long) != sizeof(void *), especially for w64. Signed-off-by: Stefan Weil <weil@mail.berlios.de> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-03-22Revert "x86: Save/restore PAT MSR"Anthony Liguori1-2/+0
This reverts commit c995b495b9d6e60ab1e390bd398a22425d0b3c8c. From Jan Kiszka: Ouch, indeed. Moreover, CPU_SAVE_VERSION was not updated (likely the reason for the breakage). Thanks for debugging this! Anthony (or whoever), please revert this unneeded commit in qemu.git. Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2011-03-16kvm: x86: Push kvm_arch_debug to kvm_arch_handle_exitJan Kiszka1-9/+16
There are no generic bits remaining in the handling of KVM_EXIT_DEBUG. So push its logic completely into arch hands, i.e. only x86 so far. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
2011-03-16kvm: x86: Reorder functions in kvm.cJan Kiszka1-54/+54
Required for next patch which will access guest debug services from kvm_arch_handle_exit. No functional changes. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
2011-03-16kvm: Align kvm_arch_handle_exit to kvm_cpu_exec changesJan Kiszka1-4/+4
Make the return code of kvm_arch_handle_exit directly usable for kvm_cpu_exec. This is straightforward for x86 and ppc, just s390 would require more work. Avoid this for now by pushing the return code translation logic into s390's kvm_arch_handle_exit. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> CC: Alexander Graf <agraf@suse.de> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
2011-03-16kvm: x86: Synchronize PAT MSR with the kernelJan Kiszka1-0/+5
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
2011-03-16x86: Save/restore PAT MSRJan Kiszka1-0/+2
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
2011-03-16x86: Properly reset PAT MSRJan Kiszka3-3/+7
Conforming to the Intel spec, set the power-on value of PAT also on reset, but save it across INIT. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
2011-03-16kvm: x86: Do not leave halt if interrupts are disabledJan Kiszka1-1/+3
When an external interrupt is pending but IF is cleared, we must not leave the halt state prematurely. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
2011-03-15KVM, MCE, unpoison memory address across rebootHuang Ying1-0/+36
In Linux kernel HWPoison processing implementation, the virtual address in processes mapping the error physical memory page is marked as HWPoison. So that, the further accessing to the virtual address will kill corresponding processes with SIGBUS. If the error physical memory page is used by a KVM guest, the SIGBUS will be sent to QEMU, and QEMU will simulate a MCE to report that memory error to the guest OS. If the guest OS can not recover from the error (for example, the page is accessed by kernel code), guest OS will reboot the system. But because the underlying host virtual address backing the guest physical memory is still poisoned, if the guest system accesses the corresponding guest physical memory even after rebooting, the SIGBUS will still be sent to QEMU and MCE will be simulated. That is, guest system can not recover via rebooting. In fact, across rebooting, the contents of guest physical memory page need not to be kept. We can allocate a new host physical page to back the corresponding guest physical address. This patch fixes this issue in QEMU-KVM via calling qemu_ram_remap() to clear the corresponding page table entry, so that make it possible to allocate a new page to recover the issue. [ Jan: rebasing and tiny cleanups] Signed-off-by: Huang Ying <ying.huang@intel.com> Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
2011-03-15kvm: x86: Fail kvm_arch_init_vcpu if MCE initialization failsJan Kiszka1-13/+17
There is no reason to continue if the kernel claims to support MCE but then fails to process our request. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> CC: Huang Ying <ying.huang@intel.com> CC: Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com> CC: Jin Dongming <jin.dongming@np.css.fujitsu.com> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
2011-03-15kvm: x86: Clean up kvm_setup_mceJan Kiszka1-7/+4
There is nothing to abstract here. Fold kvm_setup_mce into its caller and fix up the error reporting (return code of kvm_vcpu_ioctl holds the error value). Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> CC: Huang Ying <ying.huang@intel.com> CC: Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com> CC: Jin Dongming <jin.dongming@np.css.fujitsu.com> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
2011-03-15kvm: x86: Consolidate TCG and KVM MCE injection codeJan Kiszka3-260/+37
This switches KVM's MCE injection path to cpu_x86_inject_mce, both for SIGBUS and monitor initiated events. This means we prepare the MCA MSRs in the VCPUState also for KVM. We have to drop the MSRs writeback restrictions for this purpose which is now safe as every uncoordinated MSR injection is removed with this patch. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> CC: Huang Ying <ying.huang@intel.com> CC: Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com> CC: Jin Dongming <jin.dongming@np.css.fujitsu.com> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
2011-03-15x86: Run qemu_inject_x86_mce on target VCPUJan Kiszka1-29/+58
We will use the current TCG-only MCE injection path for KVM as well, and then this read-modify-write of the target VCPU state has to be performed synchronously in the corresponding thread. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
2011-03-15kvm: x86: Inject pending MCE events on state writebackJan Kiszka1-0/+60
The current way of injecting MCE events without updating of and synchronizing with the CPUState is broken and causes spurious corruptions of the MCE-related parts of the CPUState. As a first step towards a fix, enhance the state writeback code with support for injecting events that are pending in the CPUState. A pending exception will then be signaled via cpu_interrupt(CPU_INTERRUPT_MCE). And, just like for TCG, we need to leave the halt state when CPU_INTERRUPT_MCE is pending (left broken for the to-be-removed old KVM code). This will also allow to unify TCG and KVM injection code. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> CC: Huang Ying <ying.huang@intel.com> CC: Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com> CC: Jin Dongming <jin.dongming@np.css.fujitsu.com> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
2011-03-15kvm: Rename kvm_arch_process_irqchip_events to async_eventsJan Kiszka1-1/+1
We will broaden the scope of this function on x86 beyond irqchip events. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
2011-03-15kvm: x86: Move MCE functions togetherJan Kiszka1-175/+171
Pure function suffling to avoid multiple #ifdef KVM_CAP_MCE sections, no functional changes. While at it, annotate some #ifdef sections. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> CC: Huang Ying <ying.huang@intel.com> CC: Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com> CC: Jin Dongming <jin.dongming@np.css.fujitsu.com> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
2011-03-15x86: Optionally avoid injecting AO MCEs while others are pendingJan Kiszka2-8/+23
Allow to tell cpu_x86_inject_mce that it should ignore Action Optional MCE events when the target VCPU is still processing another one. This will be used by KVM soon. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> CC: Huang Ying <ying.huang@intel.com> CC: Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com> CC: Jin Dongming <jin.dongming@np.css.fujitsu.com> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
2011-03-15x86: Refine error reporting of MCE injection servicesJan Kiszka2-36/+49
As this service is used by the human monitor, make sure that errors get reported to the right channel, and also raise the verbosity. This requires to move Monitor typedef in qemu-common.h to resolve the include dependency. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> CC: Huang Ying <ying.huang@intel.com> CC: Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com> CC: Jin Dongming <jin.dongming@np.css.fujitsu.com> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
2011-03-15x86: Small cleanups of MCE helpersJan Kiszka2-17/+29
Fix some code style issues, use proper headers, and align to cpu_x86 naming scheme. No functional changes. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> CC: Huang Ying <ying.huang@intel.com> CC: Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com> CC: Jin Dongming <jin.dongming@np.css.fujitsu.com> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
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