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2014-06-10target-i386/translate.c: Remove unused tcg_gen_lshift()Peter Maydell1-8/+0
The function tcg_gen_lshift() is unused; remove it. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
2014-06-05softmmu: introduce cpu_ldst.hPaolo Bonzini1-0/+1
This will collect all load and store helpers soon. For now it is just a replacement for softmmu_exec.h, which this patch stops including directly, but we also include it where this will be necessary in order to simplify the next patch. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2014-05-28tcg: Invert the inclusion of helper.hRichard Henderson1-3/+2
Rather than include helper.h with N values of GEN_HELPER, include a secondary file that sets up the macros to include helper.h. This minimizes the files that must be rebuilt when changing the macros for file N. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-05-12target-i386: Preserve the Z bit for bt/bts/btr/btcRichard Henderson1-9/+31
Older Intel manuals (pre-2010) and current AMD manuals describe Z as undefined, but newer Intel manuals describe Z as unchanged. Cc: qemu-stable@nongnu.org Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-03-13cpu: Move breakpoints field from CPU_COMMON to CPUStateAndreas Färber1-2/+2
Most targets were using offsetof(CPUFooState, breakpoints) to determine how much of CPUFooState to clear on reset. Use the next field after CPU_COMMON instead, if any, or sizeof(CPUFooState) otherwise. Signed-off-by: Andreas Färber <afaerber@suse.de>
2014-02-28target-i386: Fix ucomis and comis memory accessRichard Henderson1-10/+36
We were loading 16 bytes for both single and double-precision scalar comparisons. Reported-by: Alexander Bluhm <bluhm@openbsd.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-02-28target-i386: Fix CC_OP_CLR vs PFRichard Henderson1-1/+1
Parity should be set for a zero result. Cc: qemu-stable@nongnu.org Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-02-19target-i386: Fix I/O bitmap checks for in/outKevin Wolf1-0/+2
Commit 1b90d56e changed the implementation of in/out imm to not assign the accessed port number to cpu_T[0] as it appeared unnecessary. However, currently gen_check_io() makes use of cpu_T[0] to implement the I/O bitmap checks, so it's in fact still used and the change broke the check, leading to #GP in legitimate cases (and probably also allowing access to ports that shouldn't be allowed). This patch reintroduces the missing assignment for these cases. Signed-off-by: Kevin Wolf <kwolf@redhat.com> Reviewed-by: Richard Henderson <rth@twiddle.net>
2014-01-07target-i386: Tidy ljmpRichard Henderson1-2/+1
Remove an unnecessary move opcode. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-01-07target-i386: Rename gen_op_jmp_T0 to gen_op_jmp_vRichard Henderson1-9/+9
And make the destination argument explicit. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-01-07target-i386: Tidy some size computationRichard Henderson1-3/+3
Clean up relics of multiple size domains: - MO_16 + 1 => - 1 + 1 => 0. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-01-07target-i386: Remove gen_op_mov_reg_A0Richard Henderson1-6/+1
Replace with its definition. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-01-07target-i386: Remove gen_op_mov_TN_regRichard Henderson1-64/+59
Replace with its definition. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-01-07target-i386: Remove gen_op_addl_T0_T1Richard Henderson1-8/+3
Replace with its definition. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-01-07target-i386: Remove gen_op_mov_reg_T1Richard Henderson1-18/+13
Replace with its definition. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-01-07target-i386: Remove gen_op_mov_reg_T0Richard Henderson1-70/+65
Replace with its definition. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-01-07target-i386: Tidy cpu_regs initializationRichard Henderson1-51/+36
Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-01-07target_i386: Clean up gen_pop_T0Richard Henderson1-47/+37
Reduce ifdefs, share more code between paths, reduce the number of TCG ops generated. Avoid re-computing the size of the operation across gen_pop_T0 and gen_pop_update. Add forgotten zero-extension in the TARGET_X86_64, !CODE64, ss32 case. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-01-07target-i386: Combine gen_push_T* into gen_push_vRichard Henderson1-74/+32
Reduce ifdefs, share more code between paths, reduce the number of TCG ops generated. Add forgotten zero-extension in the TARGET_X86_64, !CODE64, ss32 case. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-01-07target-i386: Tidy addr16 code in gen_lea_modrmRichard Henderson1-18/+16
Unlike the addr32, there was no bug. But we can use the same technique to reduce the number of TCG ops. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-01-07target-i386: Change dflag to TCGMemOpRichard Henderson1-284/+216
Changing the domain to TCGMemOp makes it easier to interoperate with other portions of the rest of the translator. We now only have one domain for size operands inside the translator, which makes things less confusing all the way around. There are still a number of helpers that continue to use the log2-1 domain. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-01-07target-i386: Change gen_op_mov_reg_A0 size parameter to TCGMemOpRichard Henderson1-24/+8
Change the domain of the parameter and update all callers. Which lets us defer completely to gen_op_mov_reg_v. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-01-07target-i386: Change aflag to TCGMemOpRichard Henderson1-91/+87
Changing the domain to TCGMemOp makes it easier to interoperate with other portions of the rest of the translator. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-01-07target-i386: Change gen_op_j*z_ecx size parameter to TCGMemOpRichard Henderson1-10/+10
Change the domain of the parameter and update all callers. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-01-07target-i386: Change gen_op_add_reg_* size parameter to TCGMemOpRichard Henderson1-54/+22
These functions used the aflags/dflags domain, which is log2-1 of the byte size. Confusingly, they used enumeration values from the log2 domain. Change the domain of the parameter and update all callers. Since we're now in a common domain, defer the deposit/extend/mov decision to gen_op_mov_reg_v. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-01-07target-i386: Use TCGMemOp for 'ot' variablesRichard Henderson1-50/+70
The 'ot' variables (operand type?) hold the log2(byte size) of the operand being manipulated. This is the same as the MO_SIZE subset of the TCGMemOp. Indeed, we often pass 'ot' to the tcg_gen_qemu_ld/st functions. Changing the type from 'int' makes it easier to see what domain the variable should be. This does require adding some default cases to some switch statements, to avoid the 'unhandled enumeration value' warning that would result from the change of type. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-01-07target-i386: Remove gen_op_andl_A0_ffffRichard Henderson1-20/+13
Replace it with tcg_gen_ext16u_tl, and in two cases merge with a previous move from cpu_regs. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-01-07target-i386: Remove gen_op_movl_T0_T1Richard Henderson1-6/+1
Replace it with its definition. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-01-07target-i386: Remove gen_op_andl_T0_imRichard Henderson1-11/+9
Replace it with its definition. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-01-07target-i386: Remove gen_op_andl_T0_ffffRichard Henderson1-25/+18
Replace it with tcg_gen_ext16u_tl. In four places we can combine that with a previous move into cpu_T[0], and in one place we can infer that the zero-extension has already happened via the previous load. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-01-07target-i386: Remove gen_movtl_T*_imRichard Henderson1-13/+3
Propagate the definitions into all users. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-01-07target-i386: Remove gen_op_mov*_A0_imRichard Henderson1-15/+2
Propagate the definitions into all users. In two cases, this allows us to share code between the 32-bit and 64-bit immediate moves. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-01-07target-i386: Remove gen_op_movl_T0_im*Richard Henderson1-20/+10
Propagate the definitions into all users. The only time that gen_op_movl_T1_imu was used, the input was type 'unsigned', so the replacement works identically. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-01-07target-i386: Remove gen_op_movl_T0_im*Richard Henderson1-22/+10
Propagate the definition of gen_op_movl_T0_im to all users. The function gen_op_movl_T0_imu was unused. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-01-07target-i386: Remove gen_op_movl_T0_0Richard Henderson1-11/+6
Propagate its definition into all users. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-01-07target-i386: Tidy extend + moveRichard Henderson1-9/+5
For the known MO_32/MO_64 cases, we don't need to extend a 32-bit temp into a 64-bit temp before storing into the hardware register. We do need the extension for the MO_8/MO_16 cases, in order for the deposit_tl operation to work, so leave those alone. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-01-07target-i386: Tidy extend + storeRichard Henderson1-17/+17
We can now use tcg_gen_qemu_st_i32 directly to avoid the extension. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-01-07target-i386: Tidy load + truncateRichard Henderson1-20/+19
We can now use tcg_gen_qemu_ld_i32 directly to avoid the truncation. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-01-07target-i386: Tidy gen_op_mov_TN_reg+tcg_gen_trunc_tl_i32Richard Henderson1-6/+3
For the 16 and 32-bit cases, we don't need to truncate via a temporary register. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-01-07target-i386: Use MO_BE for movbeRichard Henderson1-35/+5
Fold the bswap into the memory operation. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-01-07target-i386: Remove unused arguments to gen_lea_modrmRichard Henderson1-77/+69
The reg_ptr and offset_ptr outputs are universally unused. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-01-07target-i386: Tidy movslRichard Henderson1-5/+1
Always perform a sign-extending load. In the extremely unlikely case that we've used an 0x66 prefix, the extension to 64-bits is unnecessary but not wrong; the store will still examine only 16 bits. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-01-07target-i386: Tidy mov[sz][bw]Richard Henderson1-11/+12
We can use the MO_SIGN bit to tidy the reg-reg switch statement as well as pass it on to gen_op_ld_v, eliminating one call. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-01-07target-i386: Fix typo in gen_push_T1Richard Henderson1-1/+1
By inspection, obviously we should be storing T[1] not T[0]. This could only happen for x86_64 in 64-bit mode with 0x66 prefix to call insn -- i.e. never. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-01-07target-i386: Remove gen_op_st_T1_A0Richard Henderson1-7/+2
Propagate its definition into all users. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-01-07target-i386: Remove gen_op_st_T0_A0Richard Henderson1-43/+40
Propagate its definition into all users. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-01-07target-i386: Introduce gen_op_st_rm_T0_A0Richard Henderson1-61/+24
Too many places have the same test vs OR_TMP0 to indicate a write back to memory. Hoist that to a subroutine. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-01-07target-i386: Remove gen_op_lds_T0_A0Richard Henderson1-9/+4
Replace its users by gen_op_ld_v with the MO_SIGN bit set. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-01-07target-i386: Remove gen_op_ld_T1_A0Richard Henderson1-14/+9
Propagate its definition into all users. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-01-07target-i386: Remove gen_op_ldu_T0_A0Richard Henderson1-10/+5
Propagate its definition into all users. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>