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path: root/target-i386/helper2.c
AgeCommit message (Expand)AuthorFilesLines
2007-09-23SVM Support, by Alexander Graf.ths1-3/+12
2007-09-17find -type f | xargs sed -i 's/[\t ]*$//g' # Yes, again. Note the star in the...ths1-14/+14
2007-09-16find -type f | xargs sed -i 's/[\t ]$//g' # on most filesths1-83/+83
2007-09-10Fix the reported xlevel for Intel CPU, by Filip Navara.ths1-1/+1
2007-07-31Initialize old_exception, by Bernhard Kauer.ths1-0/+2
2007-04-17Ptable calculation broken for 32bit code under x86_64, by Bernhard Kauer.ths1-4/+4
2007-04-07cpu_get_phys_page_debug should return target_phys_addr_tj_mayer1-2/+2
2006-09-27enabled PSE36 for x86_64 (fix for OpenSolaris as guest)bellard1-0/+2
2006-09-24added SMM supportbellard1-3/+6
2006-06-25C99 64 bit printfbellard1-14/+14
2006-06-14use glibc syscall (David Woodhouse)bellard1-1/+4
2006-04-25enable APIC by defaultbellard1-1/+1
2006-04-23SSE3 support (Joachim Henke)bellard1-1/+1
2005-12-04generate GPF if non canonical addressesbellard1-2/+5
2005-11-28NX supportbellard1-40/+120
2005-11-23added HF_HALTED bitbellard1-4/+6
2005-11-21cpu_exec_init() changebellard1-5/+3
2005-07-23x86_64 fixes (initial patch by Filip Navara)bellard1-2/+7
2005-07-03better fpu state dumpbellard1-11/+49
2005-04-23return model id in cpuid for x86_64bellard1-0/+17
2005-02-10enabled MMX, PAE and SEPbellard1-3/+9
2005-01-28physical memory access functionsbellard1-54/+33
2005-01-25Support resolving addresses in PAE mode in cpu_get_phys_page_debugbellard1-19/+73
2005-01-12enable MMX for x86_64 toobellard1-2/+2
2005-01-08MMX/SSE supportbellard1-10/+20
2005-01-03x86_64 target supportbellard1-129/+399
2004-10-09monitor fixesbellard1-11/+13
2004-10-03removed access_type hackbellard1-1/+2
2004-06-22cpu_single_env initbellard1-1/+1
2004-06-20boot to top of 4GB spacebellard1-2/+1
2004-06-20added cpu_reset()bellard1-29/+37
2004-06-19buffer overflow fixbellard1-1/+1
2004-05-08cr0.ET fix (Win95 boot fix)bellard1-1/+1
2004-04-25dump A20 statebellard1-2/+3
2004-03-31win32 port (initial patch by kazu)bellard1-5/+4
2004-03-042.6 kernel compile fixbellard1-0/+5
2004-02-25CR0.MP/EM/TS support - native fpu support in code copy modebellard1-0/+73
2004-02-16experimental code copy support - fixed A20 emulationbellard1-1/+28
2004-02-07fixed WP semanticsbellard1-3/+3
2004-02-03more precise TLB invalidation - init cleanupbellard1-41/+62
2004-01-24combine PDE and PTE protections as in intel specs - added cpu_get_phys_page_d...bellard1-18/+62
2004-01-18fixed dirty bit support for 4M pages (L4 Pistachio fix)bellard1-2/+2
2004-01-13fixed subtle bug: in some cases PG_DIRTY was not set correctlybellard1-7/+12
2004-01-04correct value for ADDSEG is real mode (fixes GRUB boot) - update static prote...bellard1-77/+14
2004-01-04debug fixes - use more generic TLB mappingsbellard1-18/+8
2003-12-02dump irq inhibit flag as it is a part of the cpu statebellard1-2/+3
2003-11-23a20 fixbellard1-0/+4
2003-11-19always completely redefine the TLB in case of MMU faultbellard1-0/+3
2003-11-12dump more registersbellard1-10/+31
2003-11-04a20 supportbellard1-5/+30
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