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path: root/target-i386/cpu.h
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2015-10-07target-*: Drop cpu_gen_code defineRichard Henderson1-1/+0
2015-10-07target-i386: Add cc_op state to insn_startRichard Henderson1-0/+1
2015-10-02Correctly re-init EFER state during INIT IPIBill Paul1-1/+1
2015-10-02target-i386: Make check_hw_breakpoints staticRichard Henderson1-1/+0
2015-10-02target-i386: Convert kvm_default_*features to property/value pairsEduardo Habkost1-2/+9
2015-09-25i386: Rename ELF_MACHINE to be x86 specificPeter Crosthwaite1-2/+2
2015-09-25hmp: added local apic dump statePavel Butsykin1-0/+3
2015-09-16Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into stagingPeter Maydell1-0/+2
2015-09-16i386/kvm: Hyper-v crash msrs set/get'ers and migrationAndrey Smetanin1-0/+2
2015-09-15target-i386: introduce new raise_exception functionsPavel Dovgalyuk1-0/+4
2015-09-14Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into stagingPeter Maydell1-0/+3
2015-09-11tlb: Add "ifetch" argument to cpu_mmu_index()Benjamin Herrenschmidt1-1/+1
2015-09-09replace spinlock by QemuMutex.KONRAD Frederic1-0/+3
2015-08-13target-i386: Remove x86_cpu_compat_set_features()Eduardo Habkost1-3/+0
2015-07-09cpu-exec: Purge all uses of ENV_GET_CPU()Peter Crosthwaite1-1/+1
2015-07-07target-i386: avoid overflow in the tsc-frequency propertyPaolo Bonzini1-1/+1
2015-07-07i386: Introduce ARAT CPU featureJan Kiszka1-0/+3
2015-07-06target-i386: add support for SMBASE MSR and SMIsPaolo Bonzini1-0/+1
2015-06-05target-i386: use memory API to implement SMRAMPaolo Bonzini1-1/+2
2015-06-05target-i386: mask NMIs on entry to SMMPaolo Bonzini1-9/+11
2015-06-05target-i386: Use correct memory attributes for memory accessesPaolo Bonzini1-0/+12
2015-06-05target-i386: introduce cpu_get_mem_attrsPaolo Bonzini1-0/+5
2015-06-02target-i386: Fix signedness of MSR_IA32_APICBASE_BASEEduardo Habkost1-1/+1
2015-04-04target-i386: remove superfluous TARGET_HAS_SMC macroEmilio G. Cota1-2/+0
2015-03-17target-i386: Remove icc_bridge parameter from cpu_x86_create()Eduardo Habkost1-2/+1
2015-03-11Merge remote-tracking branch 'remotes/afaerber/tags/qom-cpu-for-peter' into s...Peter Maydell1-8/+1
2015-03-10cpu: Make cpu_init() return QOM CPUState objectEduardo Habkost1-8/+1
2015-03-09target-i386: Move APIC ID compatibility code to pc.cEduardo Habkost1-1/+0
2015-03-09target-i386: Move CPUX86State::cpuid_apic_id to X86CPU::apic_idEduardo Habkost1-1/+0
2015-03-03Revert "Merge remote-tracking branch 'remotes/ehabkost/tags/x86-pull-request'...Peter Maydell1-3/+10
2015-02-25target-i386: Move CPUX86State.cpuid_apic_id to X86CPU.apic_idEduardo Habkost1-1/+0
2015-02-25target-i386: Eliminate cpu_init() functionEduardo Habkost1-9/+3
2015-02-25target-i386: Rename cpu_x86_init() to cpu_x86_init_user()Eduardo Habkost1-2/+2
2015-01-26target-i386: make xmm_regs 512-bit widePaolo Bonzini1-60/+8
2015-01-20exec.c: Drop TARGET_HAS_ICE define and checksPeter Maydell1-2/+0
2014-12-15i386: do not cross the pages boundaries in replay modePavel Dovgalyuk1-0/+3
2014-12-15target-i386: get/set/migrate XSAVES stateWanpeng Li1-0/+2
2014-12-15target-i386: add feature flags for CPUID[EAX=0xd,ECX=1]Paolo Bonzini1-0/+6
2014-11-13target-i386: fix Coverity complaints about overflowsPaolo Bonzini1-1/+1
2014-11-04target-i386: Disable SVM by default in KVM modeEduardo Habkost1-0/+1
2014-11-03target-i386: Rename KVM auto-feature-enable compat functionEduardo Habkost1-1/+1
2014-10-24target-i386: add Intel AVX-512 supportChao Peng1-0/+61
2014-09-18target-i386: update fp status fixPavel Dovgalyuk1-0/+2
2014-09-12cpu-exec: Make debug_excp_handler a QOM CPU methodPeter Maydell1-1/+1
2014-08-25x86: kvm: Add MTRR support for kvm_get|put_msrs()Alex Williamson1-0/+2
2014-08-25x86: Use common variable range MTRR countsAlex Williamson1-1/+1
2014-06-25target-i386: Support "invariant tsc" flagMarcelo Tosatti1-0/+4
2014-06-05Merge remote-tracking branch 'remotes/bonzini/softmmu-smap' into stagingPeter Maydell1-7/+26
2014-06-05target-i386: raise page fault for reserved bits in large pagesPaolo Bonzini1-0/+2
2014-06-05target-i386: raise page fault for reserved physical address bitsPaolo Bonzini1-0/+10
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