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2016-05-18Fix some typos found by codespellStefan Weil1-1/+1
Signed-off-by: Stefan Weil <sw@weilnetz.de> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
2016-02-09tcg: Change tcg_global_mem_new_* to take a TCGv_ptrRichard Henderson1-41/+41
Thus, use cpu_env as the parameter, not TCG_AREG0 directly. Update all uses in the translators. Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Richard Henderson <rth@twiddle.net>
2016-01-29cris: Clean up includesPeter Maydell1-0/+1
Clean up includes so that osdep.h is included first and headers which it implies are not included manually. This commit was created with scripts/clean-includes. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 1453832250-766-32-git-send-email-peter.maydell@linaro.org
2015-12-17cris: avoid "naked" qemu_logPaolo Bonzini1-1/+1
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2015-10-07target-*: Unconditionally emit tcg_gen_insn_startRichard Henderson1-3/+0
While we're at it, emit the opcode adjacent to where we currently record data for search_pc. This puts gen_io_start et al on the "correct" side of the marker. Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
2015-10-07tcg: Rename debug_insn_start to insn_startRichard Henderson1-1/+1
With an eye toward making it mandatory. Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
2015-09-11tlb: Add "ifetch" argument to cpu_mmu_index()Benjamin Herrenschmidt1-1/+1
This is set to true when the index is for an instruction fetch translation. The core get_page_addr_code() sets it, as do the SOFTMMU_CODE_ACCESS acessors. All targets ignore it for now, and all other callers pass "false". This will allow targets who wish to split the mmu index between instruction and data accesses to do so. A subsequent patch will do just that for PowerPC. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Message-Id: <1439796853-4410-2-git-send-email-benh@kernel.crashing.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
2015-09-08target-cris: Use movcond and setcondRichard Henderson1-10/+2
Signed-off-by: Richard Henderson <rth@twiddle.net> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
2015-03-13tcg: Change translator-side labels to a pointerRichard Henderson1-4/+2
This is improved type checking for the translators -- it's no longer possible to accidentally swap arguments to the branch functions. Note that the code generating backends still manipulate labels as int. With notable exceptions, the scope of the change is just a few lines for each target, so it's not worth building extra machinery to do this change in per-target increments. Cc: Peter Maydell <peter.maydell@linaro.org> Cc: Edgar E. Iglesias <edgar.iglesias@gmail.com> Cc: Michael Walle <michael@walle.cc> Cc: Leon Alrae <leon.alrae@imgtec.com> Cc: Anthony Green <green@moxielogic.com> Cc: Jia Liu <proljc@gmail.com> Cc: Alexander Graf <agraf@suse.de> Cc: Aurelien Jarno <aurelien@aurel32.net> Cc: Blue Swirl <blauwirbel@gmail.com> Cc: Guan Xuetao <gxt@mprc.pku.edu.cn> Cc: Paolo Bonzini <pbonzini@redhat.com> Cc: Max Filippov <jcmvbkbc@gmail.com> Reviewed-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-06-09target-cris/translate.c: Remove t_gen_mov_TN_reg and t_gen_mov_reg_TNPeter Maydell1-1/+1
Remove the t_gen_mov_TN_reg and t_gen_mov_reg_TN wrappers: the latter is completely unused, and the former only used in a few places (which are thus inconsistent with the rest of the decoder which directly accesses cpu_R[]). Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
2014-03-13target-cris: Replace DisasContext::env field with CRISCPUAndreas Färber1-8/+8
This cleans up repeated cris_env_get_cpu() for cpu_abort(). Signed-off-by: Andreas Färber <afaerber@suse.de>
2014-03-13exec: Change cpu_abort() argument to CPUStateAndreas Färber1-6/+6
Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-02-16target-cris: Move TCG initialization to CRISCPU initfnAndreas Färber1-4/+1
Split out TCG initialization from cpu_cris_init(). Avoid CPUCRISState dependency for v10-specific initialization and for non-v10 by inlining the decision into the initfn as well. Signed-off-by: Andreas Färber <afaerber@suse.de>
2012-09-15target-cris: Switch to AREG0 free modeAurelien Jarno1-46/+49
Add an explicit CPUCRISState parameter instead of relying on AREG0, and use cpu_ld* in translation and interrupt handling. Remove AREG0 swapping in tlb_fill(). Switch to AREG0 free mode Signed-off-by: Blue Swirl <blauwirbel@gmail.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-09-15target-cris: Avoid AREG0 for helpersAurelien Jarno1-2/+2
Add an explicit CPUCRISState parameter instead of relying on AREG0. Signed-off-by: Blue Swirl <blauwirbel@gmail.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-06-14cris: Add break support for v10.Edgar E. Iglesias1-0/+1
Still no retb Signed-off-by: Edgar E. Iglesias <edgar@axis.com>
2012-03-14target-cris: Don't overuse CPUStateAndreas Färber1-13/+13
Scripted conversion: sed -i "s/CPUState/CPUCRISState/g" target-cris/*.[hc] sed -i "s/#define CPUCRISState/#define CPUState/" target-cris/cpu.h Signed-off-by: Andreas Färber <afaerber@suse.de> Acked-by: Anthony Liguori <aliguori@us.ibm.com>
2011-12-12cris: Handle conditional stores on CRISv10Stefan Sandstrom1-6/+66
Signed-off-by: Stefan Sandstrom <Stefan.Sandstrom@axis.com> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
2011-06-28cris: Handle opcode zeroEdgar E. Iglesias1-3/+0
It's a valid branch pc + 2. Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
2011-05-08Fix typo in comment (truely -> truly)Stefan Weil1-1/+1
Signed-off-by: Stefan Weil <weil@mail.berlios.de> Signed-off-by: Stefan Hajnoczi <stefanha@linux.vnet.ibm.com>
2011-01-10cris: Allow more TB chaining for crisv10Edgar E. Iglesias1-4/+6
Signed-off-by: Edgar E. Iglesias <edgar@axis.com>
2010-10-13cris: avoid a write only variableBlue Swirl1-3/+2
Compiling with GCC 4.6.0 20100925 produced a warning: In file included from /src/qemu/target-cris/translate.c:3154:0: /src/qemu/target-cris/translate_v10.c: In function 'dec10_prep_move_m': /src/qemu/target-cris/translate_v10.c:111:22: error: variable 'rd' set but not used [-Werror=unused-but-set-variable] Fix by deleting rd, adjust the only user. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-03-18Replace assert(0) with abort() or cpu_abort()Blue Swirl1-7/+9
When building with -DNDEBUG, assert(0) will not stop execution so it must not be used for abnormal termination. Use cpu_abort() when in CPU context, abort() otherwise. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-03-07Update to a hopefully more future proof FSF addressBlue Swirl1-2/+1
See also 8167ee883931cb20c6264fc19d040ce2dc6ceaaa, 530e7615ce3c01882e582c84dc6304ab98a3d5c5 and fad6cb1a565bb73f83fc0e2654489457b489e436. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-02-20cris: Mask interrupts on dslots for CRISv10.Edgar E. Iglesias1-0/+4
CRISv10 cores (unlike v32) do not take any interrupts while delayed jumps are pending (delay slots). Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
2010-02-15crisv10: Prettify.Edgar E. Iglesias1-95/+91
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
2010-02-15cris: Add support for CRISv10 translation.Edgar E. Iglesias1-0/+1243
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
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