summaryrefslogtreecommitdiff
path: root/target-arm
AgeCommit message (Expand)AuthorFilesLines
2013-05-26target-arm: Remove gen_ld64() and gen_st64()Peter Maydell1-15/+4
2013-05-26target-arm: Don't use TCGv when we mean TCGv_i32Peter Maydell1-224/+229
2013-05-03target-arm: Fix incorrect check of kvm_vcpu_ioctl return valuePeter Maydell1-2/+2
2013-04-19target-arm: Correctly restore FPSCRPeter Maydell1-7/+41
2013-04-19target-arm: Add some missing CPU state fields to VMStatePeter Maydell1-3/+10
2013-04-19target-arm: port ARM CPU save/load to use VMStateJuan Quintela4-215/+179
2013-04-19target-arm: Reinsert missing return statement in ARM mode SRS decodePeter Chubb1-0/+1
2013-04-15arm: fix location of some include filesPeter Maydell2-2/+2
2013-04-08hw: move headers to include/Paolo Bonzini2-2/+2
2013-03-12target-arm: Override do_interrupt for ARMv7-M profileAndreas Färber3-6/+19
2013-03-12cpu: Replace do_interrupt() by CPUClass::do_interrupt methodAndreas Färber4-5/+10
2013-03-12cpu: Pass CPUState to cpu_interrupt()Andreas Färber1-1/+1
2013-03-12cpu: Move halted and interrupt_request fields to CPUStateAndreas Färber3-5/+7
2013-03-05target-arm: Use MemoryListener to identify GIC base address for KVMPeter Maydell2-0/+119
2013-03-05ARM KVM: save and load VFP registers from kernelPeter Maydell1-3/+75
2013-03-05ARM: KVM: Add support for KVM on ARM architectureChristoffer Dall4-1/+337
2013-03-05target-arm: Drop CPUARMState* argument from bank_number()Peter Maydell1-7/+6
2013-03-05target-arm: Don't decode RFE or SRS on M profile coresPeter Maydell1-2/+3
2013-03-05target-arm: Factor out handling of SRS instructionPeter Maydell1-67/+69
2013-03-03gen-icount.h: Rename gen_icount_start/end to gen_tb_start/endPeter Maydell1-2/+2
2013-03-03cpu: Introduce ENV_OFFSET macrosAndreas Färber1-0/+2
2013-02-25target-arm: Fix sbc_CC carryRichard Henderson1-24/+4
2013-02-25arm/translate.c: Fix adc_CC/sbc_CC implementationPeter Crosthwaite1-2/+2
2013-02-23target-arm: Implement sbc_cc inlineRichard Henderson3-25/+39
2013-02-23target-arm: Implement adc_cc inlineRichard Henderson3-21/+34
2013-02-23target-arm: Use add2 in gen_add_CCRichard Henderson1-4/+3
2013-02-23target-arm: Use mul[us]2 and add2 in umlal et alRichard Henderson3-19/+14
2013-02-23target-arm: Use mul[us]2 in gen_mul[us]_i64_i32Richard Henderson1-16/+22
2013-02-16cpu: Add CPUArchState pointer to CPUStateAndreas Färber1-0/+2
2013-02-16target-arm: Move TCG initialization to ARMCPU initfnAndreas Färber2-6/+6
2013-02-16target-arm: Update ARMCPU to QOM realizefnAndreas Färber4-12/+27
2013-01-30target-arm: Rename CPU typesAndreas Färber2-5/+14
2013-01-30target-arm: Fix TCG temp leaks for WI and UNDEF VFP sysreg writesPeter Maydell1-1/+4
2013-01-27target-arm: Catch attempt to instantiate abstract type in cpu_init()Andreas Färber1-1/+2
2013-01-27target-arm: Detect attempt to instantiate non-CPU type in cpu_init()Andreas Färber2-2/+21
2013-01-15cpu: Move cpu_index field to CPUStateAndreas Färber2-2/+3
2013-01-11target-arm: Fix SWI (SVC) instruction in M profile.Alex_Rozenman@mentor.com1-1/+1
2013-01-11target-arm: use type_register() instead of type_register_static()Eduardo Habkost1-1/+1
2012-12-23Merge branch 'master' of git://git.qemu.org/qemu into qom-cpuAndreas Färber10-24/+24
2012-12-19cpu: Introduce CPUListState structAndreas Färber1-7/+2
2012-12-19fpu: move public header file to include/fpuPaolo Bonzini1-1/+1
2012-12-19softmmu: move include files to include/sysemu/Paolo Bonzini2-2/+2
2012-12-19misc: move include files to include/qemu/Paolo Bonzini2-3/+3
2012-12-19qom: move include files to include/qom/Paolo Bonzini1-1/+1
2012-12-19exec: move include files to include/exec/Paolo Bonzini8-16/+16
2012-12-19build: kill libdis, move disassemblers to disas/Paolo Bonzini1-1/+1
2012-12-16exec: refactor cpu_restore_stateBlue Swirl1-7/+1
2012-12-08TCG: Use gen_opc_instr_start from context instead of global variable.Evgeny Voevodin1-3/+3
2012-12-08TCG: Use gen_opc_icount from context instead of global variable.Evgeny Voevodin1-1/+1
2012-12-08TCG: Use gen_opc_pc from context instead of global variable.Evgeny Voevodin1-2/+2
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-23 22:05:02 +0000