index
:
sdk/emulator/qemu
1.0_post
2.0alpha
features/brillcodec_2i
features/camera
features/cnp
features/dr
features/qt_dr
features/smp
features/virtio-9p
features/vmodem
glesv3
master
opensrc_p2.3
opensrc_p2.3.1
opensrc_p2.3.2
opensrc_p2.4
opensrc_p3.0
opensrc_p4.0
sandbox/byungchul.so/tizen
sandbox/elebideau/tizen
sandbox/mmajewski2/maru-virgl-rendering-wip
sandbox/mmajewski2/standalone-virgl-wip
sandbox/pcoval/tizen
spin
tizen
tizen_2.0
tizen_2.1
tizen_2.2
tizen_3.0.m14.4_ivi
tizen_p2.3
tizen_p2.3.1
tizen_qemu_1.6
tizen_qemu_1.7
tizen_qemu_2.0
tizen_qemu_5.0.1
tizen_studio_1.2_p2.3
tizen_studio_1.2_p2.3.1
tizen_studio_1.2_p2.3.2
tizen_studio_1.2_p2.4
tizen_studio_1.2_p3.0
tizen_studio_1.3_p2.3
tizen_studio_1.3_p2.3.1
tizen_studio_1.3_p2.3.2
tizen_studio_1.3_p2.4
tizen_studio_1.3_p3.0
tizen_studio_2.0_p2.3
tizen_studio_2.0_p2.3.1
tizen_studio_2.0_p2.3.2
tizen_studio_2.0_p2.4
tizen_studio_2.0_p3.0
tizen_studio_2.0_p4.0
tizen_studio_2.0_p5.0
tizen_studio_3.0_p2.3
tizen_studio_3.0_p2.3.1
tizen_studio_3.0_p2.3.2
tizen_studio_3.0_p2.4
tizen_studio_3.0_p3.0
tizen_studio_3.0_p4.0
tizen_studio_3.0_p5.0
tizen_studio_3.5_p2.3
tizen_studio_3.5_p2.3.1
tizen_studio_3.5_p2.3.2
tizen_studio_3.5_p2.4
tizen_studio_3.5_p3.0
tizen_studio_3.5_p4.0
tizen_studio_3.5_p5.0
tizen_studio_3.5_p5.5
tizen_studio_4.0_p2.3
tizen_studio_4.0_p2.3.1
tizen_studio_4.0_p2.3.2
tizen_studio_4.0_p2.4
tizen_studio_4.0_p3.0
tizen_studio_4.0_p4.0
tizen_studio_4.0_p5.0
tizen_studio_4.0_p5.5
tizen_studio_4.0_p6.0
tizen_studio_4.5_p6.5
tizen_studio_5.0_p7.0
tizen_studio_5.5_p7.5
tizen_studio_5.5_p8.0
tizen_studio_6.0_p9.0
tizen_studio_p2.3
tizen_studio_p2.3.1
tizen_studio_p2.3.2
tizen_studio_p2.4
tizen_studio_p3.0
tizen_studio_p4.0
works/arg_renewal
Domain: SDK / Emulator;
summary
refs
log
tree
commit
diff
log msg
author
committer
range
path:
root
/
target-arm
Age
Commit message (
Expand
)
Author
Files
Lines
2012-09-10
target-arm: Fix potential buffer overflow
Stefan Weil
1
-2
/
+2
2012-08-22
arm-semi: don't leak 1KB user string lock buffer upon TARGET_SYS_OPEN
Jim Meyering
1
-6
/
+7
2012-08-10
target-arm: Fix typos in comments
Peter Maydell
6
-24
/
+24
2012-08-10
arm: translate: comment typo - s/middel/middle/
Peter A. G. Crosthwaite
1
-1
/
+1
2012-07-12
target-arm: Add support for long format translation table walks
Peter Maydell
1
-0
/
+182
2012-07-12
target-arm: Implement TTBCR changes for LPAE
Peter Maydell
1
-1
/
+14
2012-07-12
target-arm: Implement long-descriptor PAR format
Peter Maydell
1
-10
/
+69
2012-07-12
target-arm: Use target_phys_addr_t in get_phys_addr()
Peter Maydell
1
-14
/
+15
2012-07-12
target-arm: Add 64 bit PAR, TTBR0, TTBR1 for LPAE
Peter Maydell
3
-3
/
+87
2012-07-12
target-arm: Add 64 bit variants of DBGDRAR and DBGDSAR for LPAE
Peter Maydell
1
-0
/
+5
2012-07-12
target-arm: Add AMAIR0, AMAIR1 LPAE cp15 registers
Peter Maydell
1
-0
/
+16
2012-07-12
target-arm: Extend feature flags to 64 bits
Peter Maydell
3
-6
/
+6
2012-07-12
target-arm: Implement privileged-execute-never (PXN)
Peter Maydell
3
-12
/
+26
2012-07-12
ARM: Make target_phys_addr_t 64 bits and physaddrs 40 bits
Peter Maydell
1
-1
/
+1
2012-07-12
target-arm: Fix TCG temp handling in 64 bit cp writes
Peter Maydell
1
-0
/
+2
2012-07-12
target-arm: Fix some copy-and-paste errors in cp register names
Peter Maydell
1
-3
/
+3
2012-07-12
target-arm: Fix typo that meant TTBR1 accesses went to TTBR0
Peter Maydell
1
-1
/
+1
2012-07-12
target-arm: Fix CP15 based WFI
Paul Brook
1
-1
/
+1
2012-06-20
target-arm: Remove ARM_CPUID_* macros
Peter Maydell
2
-52
/
+25
2012-06-20
target-arm: Remove remaining old cp15 infrastructure
Peter Maydell
3
-100
/
+1
2012-06-20
target-arm: Move block cache ops to new cp15 framework
Peter Maydell
2
-6
/
+14
2012-06-20
target-arm: Remove c0_cachetype CPUARMState field
Peter Maydell
2
-4
/
+1
2012-06-20
target-arm: Convert final ID registers
Peter Maydell
2
-50
/
+68
2012-06-20
target-arm: Convert MPIDR
Peter Maydell
3
-22
/
+31
2012-06-20
target-arm: Convert cp15 cache ID registers
Peter Maydell
3
-32
/
+33
2012-06-20
target-arm: Convert cp15 crn=0 crm={1,2} feature registers
Peter Maydell
3
-24
/
+54
2012-06-20
target-arm: Convert cp15 crn=1 registers
Peter Maydell
3
-76
/
+61
2012-06-20
target-arm: Convert cp15 crn=9 registers
Peter Maydell
2
-79
/
+59
2012-06-20
target-arm: Convert cp15 crn=6 registers
Peter Maydell
2
-53
/
+45
2012-06-20
target-arm: convert cp15 crn=7 registers
Peter Maydell
3
-11
/
+74
2012-06-20
target-arm: Convert cp15 VA-PA translation registers
Peter Maydell
1
-43
/
+65
2012-06-20
target-arm: Convert cp15 MMU TLB control
Peter Maydell
1
-20
/
+43
2012-06-20
target-arm: Convert cp15 crn=15 registers
Peter Maydell
3
-117
/
+126
2012-06-20
target-arm: Convert cp15 crn=10 registers
Peter Maydell
1
-6
/
+5
2012-06-20
target-arm: Convert cp15 crn=13 registers
Peter Maydell
1
-30
/
+31
2012-06-20
target-arm: Convert cp15 crn=2 registers
Peter Maydell
2
-56
/
+33
2012-06-20
target-arm: Convert MMU fault status cp15 registers
Peter Maydell
1
-81
/
+107
2012-06-20
target-arm: Convert cp15 c3 register
Peter Maydell
1
-6
/
+12
2012-06-20
target-arm: Convert generic timer cp15 regs
Peter Maydell
1
-12
/
+11
2012-06-20
target-arm: Convert performance monitor registers
Peter Maydell
3
-149
/
+158
2012-06-20
target-arm: Convert TLS registers
Peter Maydell
2
-58
/
+19
2012-06-20
target-arm: Convert WFI/barriers special cases to cp_reginfo
Peter Maydell
2
-51
/
+42
2012-06-20
target-arm: Convert TEECR, TEEHBR to new scheme
Peter Maydell
3
-77
/
+45
2012-06-20
target-arm: Convert debug registers to cp_reginfo
Peter Maydell
2
-28
/
+25
2012-06-20
target-arm: Add register_cp_regs_for_features()
Peter Maydell
3
-0
/
+14
2012-06-20
target-arm: Remove old cpu_arm_set_cp_io infrastructure
Peter Maydell
4
-107
/
+1
2012-06-20
target-arm: initial coprocessor register framework
Peter Maydell
7
-3
/
+546
2012-06-20
target-arm: Fix 11MPCore cache type register value
Peter Maydell
1
-1
/
+1
2012-06-07
build: move other target-*/ objects to nested Makefile.objs
Paolo Bonzini
1
-1
/
+2
2012-06-07
build: move libobj-y variable to nested Makefile.objs
Paolo Bonzini
1
-0
/
+4
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