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2012-03-14mips hw/: Don't use CPUStateAndreas Färber1-3/+3
Scripted conversion: for file in hw/mips_*.[hc]; do sed -i "s/CPUState/CPUMIPSState/g" $file done Signed-off-by: Andreas Färber <afaerber@suse.de> Acked-by: Anthony Liguori <aliguori@us.ibm.com>
2010-07-25mips: more fixes to the MIPS interrupt glue logicAurelien Jarno1-0/+9
Commit 36388314febad3d7675ab919287f03733a560ff6 moved most of the interrupt logic to cpu-exec.c. Remove the remaining useless code and fix software interrupts. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Acked-by: Edgar E. Iglesias <edgar@axis.com> Tested-by: Edgar E. Iglesias <edgar@axis.com>
2010-07-24mips: Correct MIPS interrupt glue logic for icountEdgar E. Iglesias1-17/+6
When hw interrupt pending bits in CP0_Cause are set, the CPU should see the hw interrupt line as active. The CPU may or may not take the interrupt based on internal state (global irq mask etc) but the glue logic shouldn't care. This fixes MIPS external hw interrupts in combination with -icount. Signed-off-by: Edgar E. Iglesias <edgar@axis.com>
2010-03-27Compile some MIPS devices only onceBlue Swirl1-1/+1
Move CPU specific declarations to a separate file. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-03-14mips: add header to mips_int.c and mips_timer.cAurelien Jarno1-0/+22
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2007-11-17Break up vl.h.pbrook1-1/+2
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3674 c046a42c-6fe2-441c-8c8c-71466251a162
2007-04-07Unify IRQ handling.pbrook1-1/+12
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2635 c046a42c-6fe2-441c-8c8c-71466251a162
2007-03-31Malta CBUS UART support.ths1-1/+1
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2557 c046a42c-6fe2-441c-8c8c-71466251a162
2007-03-30Sanitize mips exception handling.ths1-8/+7
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2546 c046a42c-6fe2-441c-8c8c-71466251a162
2007-03-18Fix BD flag handling, cause register contents, implement some more bitsths1-9/+4
for R2 interrupt handling. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2493 c046a42c-6fe2-441c-8c8c-71466251a162
2007-01-24Reworking MIPS interrupt handling, by Aurelien Jarno.ths1-0/+39
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2350 c046a42c-6fe2-441c-8c8c-71466251a162
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