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2016-10-17hw/arm/virt: no ITS on older machine typesAndrew Jones1-4/+11
We should avoid exposing new hardware (through DT and ACPI) on older machine types. This patch keeps 2.7 and older from changing, despite the introduction of ITS support for 2.8. Signed-off-by: Andrew Jones <drjones@redhat.com> Reviewed-by: Eric Auger <eric.auger@redhat.com> Message-id: 1476117341-32690-3-git-send-email-drjones@redhat.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-10-10numa: reduce code duplication by adding helper numa_get_node_for_cpu()Igor Mammedov1-4/+3
Replace repeated pattern for (i = 0; i < nb_numa_nodes; i++) { if (test_bit(idx, numa_info[i].node_cpu)) { ... break; with a helper function to lookup numa node index for cpu. Suggested-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: David Gibson <david@gibson.dropbear.id.au> Reviewed-by: Shannon Zhao <shannon.zhao@linaro.org> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2016-10-04arm/virt: Add ITS to the virt boardPavel Fedin1-6/+41
If supported by the configuration, ITS will be added automatically. This patch also renames v2m_phandle to msi_phandle because it's now used by both MSI implementations. Signed-off-by: Pavel Fedin <p.fedin@samsung.com> Signed-off-by: Eric Auger <eric.auger@redhat.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 1474616617-366-7-git-send-email-eric.auger@redhat.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-10-04hw/arm/virt: add 2.8 machine typeAndrew Jones1-2/+17
Signed-off-by: Andrew Jones <drjones@redhat.com> Message-id: 1474641676-25017-1-git-send-email-drjones@redhat.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-07-14hw/arm/virt: tcg: adjust MPIDR like KVMAndrew Jones1-1/+24
KVM adjusts the MPIDR of guest vcpus based on the architecture of the host, 32-bit vs. 64-bit, and, for 64-bit, also on the type of GIC the guest is using. To be consistent and improve SGI efficiency we make the same adjustments for TCG as 64-bit KVM hosts. We neglect to add consistency with 32-bit KVM hosts, as that would reduce SGI efficiency and KVM is expected to change. As MPIDR is a system register, and thus guest visible, we only make adjustments for current and later versioned machines. Signed-off-by: Andrew Jones <drjones@redhat.com> Message-id: 1467378129-23302-3-git-send-email-drjones@redhat.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-07-07arm: virt: Parse cpu_model only onceIgor Mammedov1-21/+21
Considering that features are converted to global properties and global properties are automatically applied to every new instance of created CPU (at object_new() time), there is no point in parsing cpu_model string every time a CPU created. So move parsing outside CPU creation loop and do it only once. Parsing also should be done before any CPU is created so that features would affect the first CPU a well. Signed-off-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2016-07-07cpu: Use CPUClass->parse_features() as convertor to global propertiesIgor Mammedov1-3/+4
Currently CPUClass->parse_features() is used to parse -cpu features string and set properties on created CPU instances. But considering that features specified by -cpu apply to every created CPU instance, it doesn't make sense to parse the same features string for every CPU created. It also makes every target that cares about parsing features string explicitly call CPUClass->parse_features() parser, which gets in a way if we consider using generic device_add for CPU hotplug as device_add has not a clue about CPU specific hooks. Turns out we can use global properties mechanism to set properties on every created CPU instance for a given type. That way it's possible to convert CPU features into a set of global properties for CPU type specified by -cpu cpu_model and common Device.device_post_init() will apply them to CPU of given type automatically regardless whether it's manually created CPU or CPU created with help of device_add. Signed-off-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Eduardo Habkost <ehabkost@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2016-07-04hw/arm/virt: mark the PCIe host controller as DMA coherent in the DTArd Biesheuvel1-0/+1
Since QEMU performs cacheable accesses to guest memory when doing DMA as part of the implementation of emulated PCI devices, guest drivers should use cacheable accesses as well when running under KVM. Since this essentially means that emulated PCI devices are DMA coherent, set the 'dma-coherent' DT property on the PCIe host controller DT node. This brings the DT description into line with the ACPI description, which already marks the PCI bridge as cache coherent (see commit bc64b96c984abf). Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Message-id: 1467134090-5099-1-git-send-email-ard.biesheuvel@linaro.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-06-14hw/arm/virt: create the 2.7 machine typeAndrew Jones1-2/+18
Signed-off-by: Andrew Jones <drjones@redhat.com> Message-id: 1465746713-30414-5-git-send-email-drjones@redhat.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-06-14hw/arm/virt: introduce DEFINE_VIRT_MACHINE_AS_LATESTAndrew Jones1-3/+10
Create two variants of DEFINE_VIRT_MACHINE. One, just called DEFINE_VIRT_MACHINE, that does not set properties that only the latest machine type should have, and another that does. This will hopefully reduce potential for errors when adding new versions. Signed-off-by: Andrew Jones <drjones@redhat.com> Message-id: 1465746713-30414-4-git-send-email-drjones@redhat.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-06-14hw/arm/virt: introduce DEFINE_VIRT_MACHINEAndrew Jones1-17/+24
Use DEFINE_VIRT_MACHINE to generate versioned machine type info. Signed-off-by: Andrew Jones <drjones@redhat.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 1465746713-30414-3-git-send-email-drjones@redhat.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-06-14hw/arm/virt: separate versioned type-init codeAndrew Jones1-6/+10
Rename machvirt_info (which is specifically for 2.6 TypeInfo) to machvirt_2_6_info, and separate the type registration of the abstract machine type from the versioned type. Signed-off-by: Andrew Jones <drjones@redhat.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 1465746713-30414-2-git-send-email-drjones@redhat.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-06-14hw/arm/virt: Add PMU node for virt machineShannon Zhao1-0/+33
Add a virtual PMU device for virt machine while use PPI 7 for PMU overflow interrupt number. Signed-off-by: Shannon Zhao <shannon.zhao@linaro.org> Reviewed-by: Andrew Jones <drjones@redhat.com> Message-id: 1465267577-1808-3-git-send-email-zhaoshenglong@huawei.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-06-08hw/arm: virt uart fixxiaoqiang zhao1-4/+4
commit f0d1d2c115dffc1fbaf954d0b449db05c5eb79b1 ("hw/char: QOM'ify pl011 model") break qemu-system-arm virt machine if option '-machine secure=on' is provided. The function create_uart is called twice. So make CharDriverState pointer a parameter to create_uart instead of hardcoded. Signed-off-by: xiaoqiang zhao <zxq_yx_007@163.com> Tested-by: Jerome Forissier <jerome.forissier@linaro.org> Message-id: 1465353045-26323-1-git-send-email-zxq_yx_007@163.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-06-06hw/char: QOM'ify pl011 modelxiaoqiang zhao1-0/+1
* drop qemu_char_get_next_serial and use chardev prop * add pl011_create wrapper function to create pl011 uart device * change affected board code to use the new way Signed-off-by: xiaoqiang zhao <zxq_yx_007@163.com> Message-id: 1465028065-5855-2-git-send-email-zxq_yx_007@163.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-06-06hw/arm/virt: Reject gic-version=host for non-KVMCole Robinson1-1/+5
If you try to gic-version=host with TCG on a KVM aarch64 host, qemu segfaults, since host requires KVM APIs. Explicitly reject gic-version=host if KVM is not enabled https://bugzilla.redhat.com/show_bug.cgi?id=1339977 Signed-off-by: Cole Robinson <crobinso@redhat.com> Message-id: b1b3b0dd143b7995a7f4062966b80a2cf3e3c71e.1464273085.git.crobinso@redhat.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-05-20machine: add properties to compat_props incrementalyIgor Mammedov1-4/+0
Switch to adding compat properties incrementaly instead of completly overwriting compat_props per machine type. That removes data duplication which we have due to nested [PC|SPAPR]_COMPAT_* macros. It also allows to set default device properties from default foo_machine_options() hook, which will be used in following patch for putting VMGENID device as a function if ISA bridge on pc/q35 machines. Suggested-by: Eduardo Habkost <ehabkost@redhat.com> Signed-off-by: Igor Mammedov <imammedo@redhat.com> Acked-by: Cornelia Huck <cornelia.huck@de.ibm.com> Reviewed-by: Eduardo Habkost <ehabkost@redhat.com> [ehabkost: Fixed CCW_COMPAT_* and PC_COMPAT_0_* defines] Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2016-05-12ARM: Virt: Set numa-node-id for cpu and memory nodesShannon Zhao1-0/+8
Generate memory nodes according to NUMA topology. Set numa-node-id property for cpu and memory nodes. Signed-off-by: Shannon Zhao <shannon.zhao@linaro.org> Reviewed-by: Andrew Jones <drjones@redhat.com> Message-id: 1461667229-9216-2-git-send-email-zhaoshenglong@huawei.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-03-30ARM: Virt: Use gpio_key for power buttonShannon Zhao1-2/+5
There is a problem for power button that it will not work if an early system_powerdown request happens before guest gpio driver loads. Fix this problem by using gpio_key. Signed-off-by: Shannon Zhao <shannon.zhao@linaro.org> Message-id: 1458221140-15232-3-git-send-email-zhaoshenglong@huawei.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-03-22include/qemu/osdep.h: Don't include qapi/error.hMarkus Armbruster1-0/+1
Commit 57cb38b included qapi/error.h into qemu/osdep.h to get the Error typedef. Since then, we've moved to include qemu/osdep.h everywhere. Its file comment explains: "To avoid getting into possible circular include dependencies, this file should not include any other QEMU headers, with the exceptions of config-host.h, compiler.h, os-posix.h and os-win32.h, all of which are doing a similar job to this file and are under similar constraints." qapi/error.h doesn't do a similar job, and it doesn't adhere to similar constraints: it includes qapi-types.h. That's in excess of 100KiB of crap most .c files don't actually need. Add the typedef to qemu/typedefs.h, and include that instead of qapi/error.h. Include qapi/error.h in .c files that need it and don't get it now. Include qapi-types.h in qom/object.h for uint16List. Update scripts/clean-includes accordingly. Update it further to match reality: replace config.h by config-target.h, add sysemu/os-posix.h, sysemu/os-win32.h. Update the list of includes in the qemu/osdep.h comment quoted above similarly. This reduces the number of objects depending on qapi/error.h from "all of them" to less than a third. Unfortunately, the number depending on qapi-types.h shrinks only a little. More work is needed for that one. Signed-off-by: Markus Armbruster <armbru@redhat.com> [Fix compilation without the spice devel packages. - Paolo] Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2016-03-16machine: Use type_init() to register machine classesEduardo Habkost1-1/+1
Change all machine_init() users that simply call type_register*() to use type_init(). Cc: Evgeny Voevodin <e.voevodin@samsung.com> Cc: Maksim Kozlov <m.kozlov@samsung.com> Cc: Igor Mitsyanko <i.mitsyanko@gmail.com> Cc: Dmitry Solodkiy <d.solodkiy@samsung.com> Cc: Peter Maydell <peter.maydell@linaro.org> Cc: Rob Herring <robh@kernel.org> Cc: Andrzej Zaborowski <balrogg@gmail.com> Cc: Michael Walle <michael@walle.cc> Cc: "Hervé Poussineau" <hpoussin@reactos.org> Cc: Aurelien Jarno <aurelien@aurel32.net> Cc: Leon Alrae <leon.alrae@imgtec.com> Cc: Alexander Graf <agraf@suse.de> Cc: David Gibson <david@gibson.dropbear.id.au> Cc: Blue Swirl <blauwirbel@gmail.com> Cc: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Cc: Max Filippov <jcmvbkbc@gmail.com> Cc: "Michael S. Tsirkin" <mst@redhat.com> Acked-by: Marcel Apfelbaum <marcel@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Acked-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2016-03-16arm: virt: Move machine class init code to the abstract machine typeWei Huang1-14/+20
This patch moves the common class initialization code from "virt-2.6" to the new abstract class. An empty property is added to "virt-2.6" machine. In the meanwhile, related funtions are renamed to "virt_2_6_*" for consistency. Signed-off-by: Wei Huang <wei@redhat.com> Message-id: 1457717778-17727-3-git-send-email-wei@redhat.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-03-16arm: virt: Add an abstract ARM virt machine typeWei Huang1-5/+18
In preparation for future ARM virt machine types, this patch creates an abstract type for all ARM machines. The current machine type in QEMU (i.e. "virt") is renamed to "virt-2.6", whose naming scheme is similar to other architectures. For the purpose of backward compatibility, "virt" is converted to an alias, pointing to "virt-2.6". With this patch, "qemu -M ?" lists the following virtual machine types along with others: virt QEMU 2.6 ARM Virtual Machine (alias of virt-2.6) virt-2.6 QEMU 2.6 ARM Virtual Machine Signed-off-by: Wei Huang <wei@redhat.com> Message-id: 1457717778-17727-2-git-send-email-wei@redhat.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-03-04hw/arm/virt: Assume EL3 boot rom will handle PSCI if one is providedPeter Maydell1-7/+25
If the user passes us an EL3 boot rom, then it is going to want to implement the PSCI interface itself. In this case, disable QEMU's internal PSCI implementation so it does not get in the way, and instead start all CPUs in an SMP configuration at once (the boot rom will catch them all and pen up the secondaries until needed). The boot rom code is also responsible for editing the device tree to include any necessary information about its own PSCI implementation before eventually passing it to a NonSecure guest. (This "start all CPUs at once" approach is what both ARM Trusted Firmware and UEFI expect, since it is what the ARM Foundation Model does; the other approach would be to provide some emulated hardware for "start the secondaries" but this is simplest.) This is a compatibility break, but I don't believe that anybody was using a secure boot ROM with an SMP configuration. Such a setup would be somewhat broken since there was nothing preventing nonsecure guest code from calling the QEMU PSCI function to start up a secondary core in a way that completely bypassed the secure world. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Message-id: 1456853976-7592-1-git-send-email-peter.maydell@linaro.org
2016-03-04hw/arm/virt: Make first flash device Secure-only if booting securePeter Maydell1-14/+49
If the virt board is started with the 'secure' property set to request a Secure setup, then make the first flash device be visible only to the Secure world. This is a breaking change, but I don't expect it to be noticed by anybody, because running TZ-aware guests isn't common and those guests are generally going to be booting from the flash and implicitly expecting their Non-secure guests to not touch it. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 1455288361-30117-5-git-send-email-peter.maydell@linaro.org
2016-03-04hw/arm/virt: Load bios image to MemoryRegion, not physaddrPeter Maydell1-19/+20
If we're loading a BIOS image into the first flash device, load it into the flash's memory region specifically, not into the physical address where the flash resides. This will make a difference when the flash might be in the Secure address space rather than the Nonsecure one. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 1455288361-30117-4-git-send-email-peter.maydell@linaro.org
2016-03-04hw/arm/virt: Provide a secure-only RAM if booting in Secure modePeter Maydell1-0/+23
If we're booting in Secure mode, provide a secure-only RAM (just 16MB) so that secure firmware has somewhere to run from that won't be accessible to the Non-secure guest. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 1455288361-30117-2-git-send-email-peter.maydell@linaro.org
2016-03-04virt: Lift the maximum RAM limit from 30GB to 255GBPeter Maydell1-2/+19
The virt board restricts guests to only 30GB of RAM. This is a hangover from the vexpress-a15 board, and there's no inherent reason for it. 30GB is smaller than you might reasonably want to provision a VM for on a beefy server machine. Raise the limit to 255GB. We choose 255GB because the available space we currently have below the 1TB boundary is up to the 512GB mark, but we don't want to paint ourselves into a corner by assigning it all to RAM. So we make half of it available for RAM, with the 256GB..512GB range available for future non-RAM expansion purposes. If we need to provide more RAM to VMs in the future then we need to: * allocate a second bank of RAM starting at 2TB and working up * fix the DT and ACPI table generation code in QEMU to correctly report two split lumps of RAM to the guest * fix KVM in the host kernel to allow guests with >40 bit address spaces The last of these is obviously the trickiest, but it seems reasonable to assume that anybody configuring a VM with a quarter of a terabyte of RAM will be doing it on a host with more than a terabyte of physical address space. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Christoffer Dall <christoffer.dall@linaro.org> Tested-by: Wei Huang <wei@redhat.com> Message-id: 1456402182-11651-1-git-send-email-peter.maydell@linaro.org
2016-02-11hw/arm/virt: fix max-cpus checkAndrew Jones1-5/+5
mach-virt doesn't yet support hotplug, but command lines specifying -smp <num>,maxcpus=<bigger-num> don't fail. Of course specifying bigger-num as something bigger than the machine supports, e.g. > 8 on a gicv2 machine, should fail though. This fix also makes mach- virt's max-cpus check truly consistent with the one in vl.c:main, as the one there was already correctly checking max-cpus instead of smp-cpus. Reported-by: Shannon Zhao <shannon.zhao@linaro.org> Signed-off-by: Andrew Jones <drjones@redhat.com> Reviewed-by: Shannon Zhao <shannon.zhao@linaro.org> Message-id: 1454511578-24863-1-git-send-email-drjones@redhat.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-01-21hw/arm/virt: Add always-on property to the virt board timerChristoffer Dall1-0/+1
The virt board has an arch timer, which is always on. Emit the "always-on" property to indicate to Linux that it can switch off the periodic timer and reduces the amount of interrupts injected into a guest. Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org> Reviewed-by: Andrew Jones <drjones@redhat.com> Message-id: 1453204158-11412-1-git-send-email-christoffer.dall@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-01-21hw/arm/virt: add secure memory region and UARTPeter Maydell1-7/+48
Add a secure memory region to the virt board, which is the same as the nonsecure memory region except that it also has a secure-only UART in it. This is only created if the board is started with the '-machine secure=on' property. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Acked-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
2016-01-21hw/arm/virt: Wire up memory region to CPUs explicitlyPeter Maydell1-0/+3
Wire up the system memory region to the CPUs explicitly by setting the QOM property. This doesn't change anything over letting it default, but will be needed for adding a secure memory region later. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Acked-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
2016-01-18hw/arm: Clean up includesPeter Maydell1-0/+1
Clean up includes so that osdep.h is included first and headers which it implies are not included manually. This commit was created with scripts/clean-includes. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 1449505425-32022-4-git-send-email-peter.maydell@linaro.org
2016-01-13hw/arm/virt: Fix property "gic-version" error handlingMarkus Armbruster1-3/+2
virt_set_gic_version() calls exit(1) when passed an invalid property value. Property setters are not supposed to do that. Screwed up in commit b92ad39. Harmless, because the property belongs to a machine. Set an error object instead. Cc: Peter Maydell <peter.maydell@linaro.org> Cc: qemu-arm@nongnu.org Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
2016-01-11hw/arm/virt: Support legacy -nic command line syntaxAshok Kumar1-0/+14
Support the legacy -nic syntax for creating PCI network devices as well as the new-style -device options. This makes life easier for people moving from x86 KVM virtualization to ARM KVM virtualization and expecting their network configuration options to work the same way for both setups. We use "virtio" as the default NIC model if the user doesn't specify one. Signed-off-by: Ashok Kumar <ashoks@broadcom.com> Message-id: 1452091659-17698-1-git-send-email-ashoks@broadcom.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> [PMM: expanded and clarified commit message] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-12-17ARM: Virt: Add gpio-keys node for Poweroff using DTShannon Zhao1-0/+16
Add a gpio-keys node. This is used for Poweroff for the systems which use DT not ACPI. Signed-off-by: Shannon Zhao <zhaoshenglong@huawei.com> Signed-off-by: Shannon Zhao <shannon.zhao@linaro.org> Tested-by: Wei Huang <wei@redhat.com> Message-id: 1449804086-3464-11-git-send-email-zhaoshenglong@huawei.com [PMM: use "standard-headers/linux/input.h" rather than <linux/input.h>] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-12-17ARM: Virt: Add QEMU powerdown notifier and hook it to GPIO Pin 3Shannon Zhao1-1/+15
Currently mach-virt model doesn't support powerdown request. Guest VM doesn't react to system_powerdown from monitor console (or QMP) because there is no communication mechanism for such requests. This patch registers GPIO Pin 3 with powerdown notification. So guest VM can receive notification when such powerdown request is triggered. Signed-off-by: Wei Huang <wei@redhat.com> Signed-off-by: Shannon Zhao <zhaoshenglong@huawei.com> Signed-off-by: Shannon Zhao <shannon.zhao@linaro.org> Reviewed-by: Wei Huang <wei@redhat.com> Tested-by: Wei Huang <wei@redhat.com> Message-id: 1449804086-3464-10-git-send-email-zhaoshenglong@huawei.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-12-17ARM: Virt: Add a GPIO controllerShannon Zhao1-0/+30
ACPI 5.0 supports GPIO-signaled ACPI Events. This can be used for powerdown, hotplug evnets. Add a GPIO controller in machine virt, to support powerdown, maybe can be used for cpu hotplug. And here we use pl061. Signed-off-by: Shannon Zhao <zhaoshenglong@huawei.com> Signed-off-by: Shannon Zhao <shannon.zhao@linaro.org> Reviewed-by: Wei Huang <wei@redhat.com> Tested-by: Wei Huang <wei@redhat.com> Message-id: 1449804086-3464-4-git-send-email-zhaoshenglong@huawei.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-11-10hw/arm/virt: error_report cleanupsAndrew Jones1-5/+5
Signed-off-by: Andrew Jones <drjones@redhat.com> Reviewed-by: Markus Armbruster <armbru@redhat.com> Message-id: 1446909925-12201-1-git-send-email-drjones@redhat.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-10-27hw/arm/virt: don't use a15memmap directlyAndrew Jones1-4/+21
We should always go through VirtBoardInfo when we need the memmap. To avoid using a15memmap directly, in this case, we need to defer the max-cpus check from class init time to instance init time. In class init we now use MAX_CPUMASK_BITS for max_cpus initialization, which is the maximum QEMU supports, and also, incidentally, the maximum KVM/gicv3 currently supports. Also, a nice side-effect of delaying the max-cpus check is that we now get more appropriate error messages for gicv2 machines that try to configure more than 123 cpus. Before this patch it would complain that the requested number of cpus was greater than 123, but for gicv2 configs, it should complain that the number is greater than 8. Signed-off-by: Andrew Jones <drjones@redhat.com> Message-id: 1445189728-860-3-git-send-email-drjones@redhat.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-10-19Enable fw_cfg DMA interface for ARMMarc Marí1-4/+4
Enable the fw_cfg DMA interface for the ARM virt machine. Based on Gerd Hoffman's initial implementation. Signed-off-by: Marc Marí <markmb@redhat.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2015-10-19Implement fw_cfg DMA interfaceMarc Marí1-1/+1
Based on the specifications on docs/specs/fw_cfg.txt This interface is an addon. The old interface can still be used as usual. Based on Gerd Hoffman's initial implementation. Signed-off-by: Marc Marí <markmb@redhat.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2015-10-16hw/arm/virt: Allow zero address for PCI IO spaceAlexander Gordeev1-0/+1
Currently PCI IO address 0 is not allowed even though the IO space starts from 0. This update makes PCI IO address 0 usable. CC: Peter Maydell <peter.maydell@linaro.org> CC: Andrew Jones <drjones@redhat.com> Signed-off-by: Alexander Gordeev <agordeev@redhat.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-10-16hw/arm/virt: smbios: inform guest of kvmAndrew Jones1-1/+6
ARM/AArch64 KVM guests don't have any way to identify themselves as KVM guests (x86 guests use a CPUID leaf). Now, we could discuss all sorts of reasons why guests shouldn't need to know that, but then there's always some case where it'd be nice... Anyway, now that we have SMBIOS tables in ARM guests, it's easy for the guest to know that it's a QEMU instance. This patch takes that one step further, also identifying KVM, when appropriate. Again, we could debate why generally nothing should care whether it's of type QEMU or QEMU/KVM, but again, sometimes it's nice to know... Signed-off-by: Andrew Jones <drjones@redhat.com> Reviewed-by: Wei Huang <wei@redhat.com> Message-id: 1443017892-15567-1-git-send-email-drjones@redhat.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-09-24hw/arm/virt: Add gic-version option to virt machinePavel Fedin1-23/+101
Add gic_version to VirtMachineState, set it to value of the option and pass it around where necessary. Instantiate devices and fdt nodes according to the choice. max_cpus for virt machine increased to 123 (calculated from redistributor space available in the memory map). GICv2 compatibility check happens inside arm_gic_common_realize(). ITS region is added to the memory map too, however currently it not used, just reserved. Signed-off-by: Pavel Fedin <p.fedin@samsung.com> Tested-by: Ashok kumar <ashoks@broadcom.com> [PMM: Added missing cpu_to_le* calls, thanks to Shannon Zhao] Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-09-19machine: Set MachineClass::name automaticallyEduardo Habkost1-3/+1
Now all TYPE_MACHINE subclasses use MACHINE_TYPE_NAME to generate the class name. So instead of requiring each subclass to set MachineClass::name manually, we can now set it automatically at the TYPE_MACHINE class_base_init() function. Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Reviewed-by: Marcel Apfelbaum <marcel@redhat.com> [AF/ehabkost: Updated for s390-ccw machines] [AF: Cleanup of intermediate virt and vexpress name handling] Signed-off-by: Andreas Färber <afaerber@suse.de>
2015-09-19arm: Rename virt machine class to use MACHINE_TYPE_NAMEEduardo Habkost1-2/+3
Machine class names should use the "-machine" suffix to allow class-name-based machine class lookup to work. Rename the arm virt machine class using the MACHINE_TYPE_NAME macro. Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Reviewed-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Andreas Färber <afaerber@suse.de>
2015-09-08hw/arm/virt: Enable TZ extensions on the GIC if we are using themPeter Maydell1-2/+5
If we're creating a board with support for TrustZone, then enable it on the GIC model as well as on the CPUs. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Peter Crosthwaite <crosthwaite.peter@gmail.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Message-id: 1441383782-24378-7-git-send-email-peter.maydell@linaro.org
2015-09-08hw/arm/virt: Default to not providing TrustZone supportPeter Maydell1-2/+5
Switch the default for the 'virt' board to not providing TrustZone support in either the CPU or the GIC. This is primarily for the benefit of UEFI, which currently assumes there is no TrustZone support, and does not set the GIC up correctly if it is TZ-aware. It also means the board is consistent about its behaviour whether we're using KVM or TCG (KVM never has TrustZone support). If TrustZone support is required (for instance for running test suites or TZ-aware firmware) it can be enabled with the "-machine secure=on" command line option. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Peter Crosthwaite <crosthwaite.peter@gmail.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Message-id: 1441383782-24378-6-git-send-email-peter.maydell@linaro.org
2015-09-07arm/virt: Add full-sized CPU affinity handlingPavel Fedin1-2/+32
At least with KVM, currently there's no reason why QEMU would not be capable of handling Aff3 != 0. This commit fixes up FDT creation in such a case. Signed-off-by: Pavel Fedin <p.fedin@samsung.com> Message-id: eef5a86e6d9a313780dbc23b35fcb65df42a3e9e.1441366248.git.p.fedin@samsung.com [PMM: folded two overlong lines] Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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