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2016-03-23target-tricore: Add FPU infrastructureBastian Koppelmann1-1/+1
This patch adds a file for all the FPU related helpers with all the includes, useful defines, and a function to update the status bits. Additionally it adds a mask for the rounding mode bits of PSW as well as all the opcodes for the FPU instructions. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> Message-Id: <1457708597-3025-2-git-send-email-kbastian@mail.uni-paderborn.de>
2016-02-19fpu: Use plain 'int' rather than 'int_fast16_t' for exponentsPeter Maydell2-62/+62
Use the plain 'int' type rather than 'int_fast16_t' for handling exponents. Exponents don't need to be exactly 16 bits, so using int16_t for them would confuse more than it clarified. This should be a safe change because int_fast16_t semantics permit use of 'int' (and on 32-bit glibc that is what you get). Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Message-id: 1453807806-32698-4-git-send-email-peter.maydell@linaro.org
2016-02-19fpu: Use plain 'int' rather than 'int_fast16_t' for shift countsPeter Maydell2-20/+32
Use the plain 'int' type rather than 'int_fast16_t' for shift counts in the various shift related functions, since we don't actually care about the size of the integer at all here, and using int16_t would be confusing. This should be a safe change because int_fast16_t semantics permit use of 'int' (and on 32-bit glibc that is what you get). Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Message-id: 1453807806-32698-3-git-send-email-peter.maydell@linaro.org
2016-02-19fpu: Remove use of int_fast16_t in conversions to int16Peter Maydell1-14/+14
Make the functions which convert floating point to 16 bit integer return int16_t rather than int_fast16_t, and correspondingly use int_fast16_t in their internal implementations where appropriate. (These functions are used only by the ARM target.) Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Message-id: 1453807806-32698-2-git-send-email-peter.maydell@linaro.org
2016-02-04all: Clean up includesPeter Maydell1-2/+1
Clean up includes so that osdep.h is included first and headers which it implies are not included manually. This commit was created with scripts/clean-includes. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 1454089805-5470-16-git-send-email-peter.maydell@linaro.org
2016-01-22softfloat: fix return type of roundAndPackFloat16Aurelien Jarno1-1/+1
The roundAndPackFloat16 function should return a float16 value, not a float32 one. Fix that. Cc: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 1452700993-6570-1-git-send-email-aurelien@aurel32.net Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-01-22fpu: Replace int8 typedef with int8_tPeter Maydell3-39/+39
Replace the int8 softfloat-specific typedef with int8_t. This change was made with find include hw fpu target-* -name '*.[ch]' | xargs sed -i -e 's/\bint8\b/int8_t/g' together with manual removal of the typedef definition, and manual undoing of various mis-hits. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <rth@twiddle.net> Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Acked-by: Leon Alrae <leon.alrae@imgtec.com> Acked-by: James Hogan <james.hogan@imgtec.com> Message-id: 1452603315-27030-6-git-send-email-peter.maydell@linaro.org
2016-01-22fpu: Replace uint32 typedef with uint32_tPeter Maydell1-11/+11
Replace the uint32 softfloat-specific typedef with uint32_t. This change was made with find include hw fpu target-* -name '*.[ch]' | xargs sed -i -e 's/\buint32\b/uint32_t/g' together with manual removal of the typedef definition, manual undoing of various mis-hits, and another couple of fixes found via test compilation. All the uses in hw/ were using the wrong type by mistake. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <rth@twiddle.net> Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Acked-by: Leon Alrae <leon.alrae@imgtec.com> Acked-by: James Hogan <james.hogan@imgtec.com> Message-id: 1452603315-27030-5-git-send-email-peter.maydell@linaro.org
2016-01-22fpu: Replace int32 typedef with int32_tPeter Maydell1-53/+53
Replace the int32 softfloat-specific typedef with int32_t. This change was made with find hw include fpu target-* -name '*.[ch]' | xargs sed -i -e 's/\bint32\b/int32_t/g' together with manual removal of the typedef definition, and manual undoing of some mis-hits where macro arguments were being used for token pasting rather than as a type. The uses in hw/ipmi/ should not have been using this type at all. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <rth@twiddle.net> Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Acked-by: Leon Alrae <leon.alrae@imgtec.com> Acked-by: James Hogan <james.hogan@imgtec.com> Message-id: 1452603315-27030-4-git-send-email-peter.maydell@linaro.org
2016-01-22fpu: Replace uint64 typedef with uint64_tPeter Maydell1-5/+5
Replace the uint64 softfloat-specific typedef with uint64_t. This change was made with find include fpu target-* -name '*.[ch]' | xargs sed -i -e 's/\buint64\b/uint64_t/g' together with manual removal of the typedef definition, and manual undoing of some mis-hits where macro arguments were being used for token pasting rather than as a type. Note that the target-mips/kvm.c and target-s390x/kvm.c changes are fixing code that should not have been using the uint64 type in the first place. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <rth@twiddle.net> Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Acked-by: Leon Alrae <leon.alrae@imgtec.com> Acked-by: James Hogan <james.hogan@imgtec.com> Message-id: 1452603315-27030-3-git-send-email-peter.maydell@linaro.org
2016-01-22fpu: Replace int64 typedef with int64_tPeter Maydell1-15/+15
Replace the int64 softfloat-specific typedef with int64_t. This change was made with find include fpu target-* -name '*.[ch]' | xargs sed -i -e 's/\bint64\b/int64_t/g' together with manual removal of the typedef definition, and manual undoing of some mis-hits where macro arguments were being used for token pasting rather than as a type. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <rth@twiddle.net> Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Acked-by: Leon Alrae <leon.alrae@imgtec.com> Message-id: 1452603315-27030-2-git-send-email-peter.maydell@linaro.org
2015-06-05target-s390x: define default NaN valuesAurelien Jarno1-2/+6
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Alexander Graf <agraf@suse.de>
2015-02-06softfloat: expand out STATUS macroPeter Maydell2-110/+153
Expand out and remove the STATUS macro. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <rth@twiddle.net>
2015-02-06softfloat: expand out STATUS_VARPeter Maydell2-460/+585
Expand out and remove the STATUS_VAR macro. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <rth@twiddle.net>
2015-02-06softfloat: Expand out the STATUS_PARAM macroPeter Maydell2-203/+234
Expand out STATUS_PARAM wherever it is used and delete the definition. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <rth@twiddle.net>
2015-01-29softfloat: Clarify license statusPeter Maydell3-3/+141
The code in the softfloat source files is under a mixture of licenses: the original code and many changes from QEMU contributors are under the base SoftFloat-2a license; changes from Stefan Weil and RedHat employees are GPLv2-or-later; changes from Fabrice Bellard are under the BSD license. Clarify this in the comments at the top of each affected source file, including a statement about the assumed licensing for future contributions, so we don't need to remember to ask patch submitters explicitly to pick a license. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Acked-by: Andreas Färber <afaerber@suse.de> Acked-by: Aurelien Jarno <aurelien@aurel32.net> Acked-by: Avi Kivity <avi.kivity@gmail.com> Acked-by: Ben Taylor <bentaylor.solx86@gmail.com> Acked-by: Blue Swirl <blauwirbel@gmail.com> Acked-by: Christophe Lyon <christophe.lyon@st.com> Acked-by: Fabrice Bellard <fabrice@bellard.org> Acked-by: Guan Xuetao <gxt@mprc.pku.edu.cn> Acked-by: Juan Quintela <quintela@redhat.com> Acked-by: Max Filippov <jcmvbkbc@gmail.com> Acked-by: Paul Brook <paul@codesourcery.com> Acked-by: Paolo Bonzini <pbonzini@redhat.com> Acked-by: Peter Maydell <peter.maydell@linaro.org> Acked-by: Richard Henderson <rth@twiddle.net> Acked-by: Richard Sandiford <rdsandiford@googlemail.com> Acked-by: Stefan Weil <sw@weilnetz.de> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Message-id: 1421073508-23909-5-git-send-email-peter.maydell@linaro.org
2015-01-29softfloat: Revert and reimplement remaining parts of b645bb4885 and 5a6932d51dPeter Maydell1-28/+29
Revert the parts of commits b645bb4885 and 5a6932d51d which are still in the codebase and under a SoftFloat-2b license. Reimplement support for architectures where the most significant bit in the mantissa is 1 for a signaling NaN rather than a quiet NaN, by adding handling for SNAN_BIT_IS_ONE being set to the functions which test values for NaN-ness. This includes restoring the bugfixes lost in the reversion where some of the float*_is_quiet_nan() functions were returning true for both signaling and quiet NaNs. [This is a mechanical squashing together of two separate "revert" and "reimplement" patches.] Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Message-id: 1421073508-23909-4-git-send-email-peter.maydell@linaro.org
2015-01-29softfloat: Revert and reimplement remaining portions of 75d62a5856 and ↵Peter Maydell1-35/+65
3430b0be36f Revert the remaining portions of commits 75d62a5856 and 3430b0be36f which are under a SoftFloat-2b license, ie the functions uint64_to_float32() and uint64_to_float64(). (The float64_to_uint64() and float64_to_uint64_round_to_zero() functions were completely rewritten in commits fb3ea83aa and 0a87a3107d so can stay.) Reimplement from scratch the uint64_to_float64() and uint64_to_float32() conversion functions. [This is a mechanical squashing together of two separate "revert" and "reimplement" patches.] Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Message-id: 1421073508-23909-3-git-send-email-peter.maydell@linaro.org
2015-01-29softfloat: Apply patch corresponding to rebasing to softfloat-2aPeter Maydell3-56/+50
This commit applies the changes to master which correspond to replacing commit 158142c2c2df with a set of changes made by: * taking the SoftFloat-2a release * mechanically transforming the block comment style * reapplying Fabrice's original changes from 158142c2c2df This commit was created by: diff -u 158142c2c2df import-sf-2a patch -p1 --fuzz 10 <../relicense-patch.txt (where import-sf-2a is the branch resulting from the changes above). Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Message-id: 1421073508-23909-2-git-send-email-peter.maydell@linaro.org
2014-10-14softfloat: add functions corresponding to IEEE-2008 min/maxNumMagLeon Alrae1-6/+31
Add abs argument to the existing softfloat minmax() function and define new float{32,64}_{min,max}nummag functions. minnummag(x,y) returns x if |x| < |y|, returns y if |y| < |x|, otherwise minnum(x,y) maxnummag(x,y) returns x if |x| > |y|, returns y if |y| > |x|, otherwise maxnum(x,y) Signed-off-by: Leon Alrae <leon.alrae@imgtec.com> Reviewed-by: Aurelien Jarno <aurelien@aurel32.net>
2014-06-23fpu: softfloat: drop INLINE macroLuiz Capitulino2-43/+43
This commit expands all uses of the INLINE macro and drop it. The reason for this is to avoid clashes with external libraries with bad name conventions and also because renaming keywords is not a good practice. PS: I'm fine with this change to be licensed under softfloat-2a or softfloat-2b. Signed-off-by: Luiz Capitulino <lcapitulino@redhat.com>
2014-04-08softfloat: Introduce float32_to_uint64_round_to_zeroTom Musta1-0/+20
This change adds the float32_to_uint64_round_to_zero function to the softfloat library. This function fills out the complement of float32 to INT round-to-zero conversion rountines, where INT is {int32_t, uint32_t, int64_t, uint64_t}. This contribution can be licensed under either the softfloat-2a or -2b license. Signed-off-by: Tom Musta <tommusta@gmail.com> Tested-by: Tom Musta <tommusta@gmail.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Alexander Graf <agraf@suse.de>
2014-03-17softfloat: export squash_input_denormal functionsAlex Bennée1-2/+2
I need these available outside of softfloat for some of the reciprocal processing in aarch64 helper functions. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <rth@twiddle.net> Message-id: 1394822294-14837-20-git-send-email-peter.maydell@linaro.org
2014-02-20softfloat: Support halving the result of muladd operationPeter Maydell1-0/+38
The ARMv8 instruction set includes a fused floating point reciprocal square root step instruction which demands an "(x * y + z) / 2" fused operation. Support this by adding a flag to the softfloat muladd operations which requests that the result is halved before rounding. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <rth@twiddle.net>
2014-01-08softfloat: Add support for ties-away roundingPeter Maydell1-0/+54
IEEE754-2008 specifies a new rounding mode: "roundTiesToAway: the floating-point number nearest to the infinitely precise result shall be delivered; if the two nearest floating-point numbers bracketing an unrepresentable infinitely precise result are equally near, the one with larger magnitude shall be delivered." Implement this new mode (it is needed for ARM). The general principle is that the required code is exactly like the ties-to-even code, except that we do not need to do the "in case of exact tie clear LSB to round-to-even", because the rounding operation naturally causes the exact tie to round up in magnitude. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <rth@twiddle.net>
2014-01-08softfloat: Refactor code handling various rounding modesPeter Maydell1-164/+241
Refactor the code in various functions which calculates rounding increments given the current rounding mode, so that instead of a set of nested if statements we have a simple switch statement. This will give us a clean place to add the case for the new tiesAway rounding mode. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <rth@twiddle.net>
2014-01-08softfloat: Add float16 <=> float64 conversion functionsPeter Maydell1-0/+75
Add the conversion functions float16_to_float64() and float64_to_float16(), which will be needed for the ARM A64 instruction set. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <rth@twiddle.net>
2014-01-08softfloat: Factor out RoundAndPackFloat16 and NormalizeFloat16SubnormalPeter Maydell1-84/+125
In preparation for adding conversions between float16 and float64, factor out code currently done inline in the float16<=>float32 conversion functions into functions RoundAndPackFloat16 and NormalizeFloat16Subnormal along the lines of the existing versions for the other float types. Note that we change the handling of zExp from the inline code to match the API of the other RoundAndPackFloat functions; however we leave the positioning of the binary point between bits 22 and 23 rather than shifting it up to the high end of the word. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <rth@twiddle.net>
2014-01-08softfloat: Provide complete set of accessors for fp statePeter Maydell1-15/+0
Tidy up the get/set accessors for the fp state to add missing ones and make them all inline in softfloat.h rather than some inline and some not. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <rth@twiddle.net>
2014-01-08softfloat: Fix float64_to_uint32_round_to_zeroTom Musta1-8/+7
The float64_to_uint32_round_to_zero routine is incorrect. For example, the following test pattern: 425F81378DC0CD1F / 0x1.f81378dc0cd1fp+38 will erroneously set the inexact flag. This patch re-implements the routine to use the float64_to_uint64_round_to_zero routine. If saturation occurs we ignore any flags set by the conversion function and raise only Invalid. This contribution can be licensed under either the softfloat-2a or -2b license. Signed-off-by: Tom Musta <tommusta@gmail.com> Message-id: 1387397961-4894-6-git-send-email-tommusta@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <rth@twiddle.net>
2014-01-08softfloat: Fix float64_to_uint32Tom Musta1-8/+7
The float64_to_uint32 has several flaws: - for numbers between 2**32 and 2**64, the inexact exception flag may get incorrectly set. In this case, only the invalid flag should be set. test pattern: 425F81378DC0CD1F / 0x1.f81378dc0cd1fp+38 - for numbers between 2**63 and 2**64, incorrect results may be produced: test pattern: 43EAAF73F1F0B8BD / 0x1.aaf73f1f0b8bdp+63 This patch re-implements float64_to_uint32 to re-use the float64_to_uint64 routine (instead of float64_to_int64). For the saturation case, we ignore any flags which the conversion routine has set and raise only the invalid flag. This contribution can be licensed under either the softfloat-2a or -2b license. Signed-off-by: Tom Musta <tommusta@gmail.com> Message-id: 1387397961-4894-5-git-send-email-tommusta@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <rth@twiddle.net>
2014-01-08softfloat: Fix float64_to_uint64_round_to_zeroTom Musta1-7/+5
The float64_to_uint64_round_to_zero routine is incorrect. For example, the following test pattern: 46697351FF4AEC29 / 0x1.97351ff4aec29p+103 currently produces 8000000000000000 instead of FFFFFFFFFFFFFFFF. This patch re-implements the routine to temporarily force the rounding mode and use the float64_to_uint64 routine. This contribution can be licensed under either the softfloat-2a or -2b license. Signed-off-by: Tom Musta <tommusta@gmail.com> Message-id: 1387397961-4894-4-git-send-email-tommusta@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <rth@twiddle.net>
2014-01-08softfloat: Add float32_to_uint64()Tom Musta1-0/+46
This patch adds the float32_to_uint64() routine, which converts a 32-bit floating point number to an unsigned 64 bit number. This contribution can be licensed under either the softfloat-2a or -2b license. Signed-off-by: Tom Musta <tommusta@gmail.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> [PMM: removed harmless but silly int64_t casts] Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <rth@twiddle.net>
2014-01-08softfloat: Fix factor 2 error for scalbn on denormal inputsPeter Maydell1-8/+21
If the input to float*_scalbn() is denormal then it represents a number 0.[mantissabits] * 2^(1-exponentbias) (and the actual exponent field is all zeroes). This means that when we convert it to our unpacked encoding the unpacked exponent must be one greater than for a normal number, which represents 1.[mantissabits] * 2^(e-exponentbias) for an exponent field e. This meant we were giving answers too small by a factor of 2 for all denormal inputs. Note that the float-to-int routines also have this behaviour of not adjusting the exponent for denormals; however there it is harmless because denormals will all convert to integer zero anyway. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Reviewed-by: Richard Henderson <rth@twiddle.net>
2014-01-08softfloat: Only raise Invalid when conversions to int are out of rangePeter Maydell1-12/+16
We implement a number of float-to-integer conversions using conversion to an integer type with a wider range and then a check against the narrower range we are actually converting to. If we find the result to be out of range we correctly raise the Invalid exception, but we must also suppress other exceptions which might have been raised by the conversion function we called. This won't throw away exceptions we should have preserved, because for the 'core' exception flags the IEEE spec mandates that the only valid combinations of exception that can be raised by a single operation are Inexact + Overflow and Inexact + Underflow. For the non-IEEE softfloat flag for input denormals, we can guarantee that that flag won't have been set for out of range float-to-int conversions because a squashed denormal by definition goes to plus or minus zero, which is always in range after conversion to integer zero. This bug has been fixed for some of the float-to-int conversion routines by previous patches; fix it for the remaining functions as well, so that they all restore the pre-conversion status flags prior to raising Invalid. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Reviewed-by: Richard Henderson <rth@twiddle.net>
2014-01-08softfloat: Fix float64_to_uint64Tom Musta1-8/+93
The comment preceding the float64_to_uint64 routine suggests that the implementation is broken. And this is, indeed, the case. This patch properly implements the conversion of a 64-bit floating point number to an unsigned, 64 bit integer. This contribution can be licensed under either the softfloat-2a or -2b license. Signed-off-by: Tom Musta <tommusta@gmail.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <rth@twiddle.net>
2014-01-08softfloat: Make the int-to-float functions take exact-width typesPeter Maydell1-13/+13
Currently the int-to-float functions take types which are specified as "at least X bits wide", rather than "exactly X bits wide". This is confusing and unhelpful since it means that the callers have to include an explicit cast to [u]intXX_t to ensure the correct behaviour. Fix them all to take the exactly-X-bits-wide types instead. Note that this doesn't change behaviour at all since at the moment we happen to define the 'int32' and 'uint32' types as exactly 32 bits wide, and the 'int64' and 'uint64' types as exactly 64 bits wide. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <rth@twiddle.net>
2014-01-08softfloat: Add float to 16bit integer conversions.Will Newton1-0/+80
ARMv8 requires support for converting 32 and 64bit floating point values to signed and unsigned 16bit integers. Signed-off-by: Will Newton <will.newton@linaro.org> [PMM: updated not to incorrectly set Inexact for Invalid inputs] Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <rth@twiddle.net>
2014-01-08softfloat: Fix exception flag handling for float32_to_float16()Peter Maydell1-39/+66
Our float32 to float16 conversion routine was generating the correct numerical answers, but not always setting the right set of exception flags. Fix this, mostly by rearranging the code to more closely resemble RoundAndPackFloat*, and in particular: * non-IEEE halfprec always raises Invalid for input NaNs * we need to check for the overflow case before underflow * we weren't getting the tininess-detected-after-rounding case correct (somewhat academic since only ARM uses halfprec and it is always tininess-detected-before-rounding) * non-IEEE halfprec overflow raises only Invalid, not Invalid + Inexact * we weren't setting Inexact when we should Also add some clarifying comments about what the code is doing. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <rth@twiddle.net>
2013-12-10softfloat: Add minNum() and maxNum() functions to softfloat.Will Newton1-3/+29
Add floatnn_minnum() and floatnn_maxnum() functions which are equivalent to the minNum() and maxNum() functions from IEEE 754-2008. They are similar to min() and max() but differ in the handling of QNaN arguments. Signed-off-by: Will Newton <will.newton@linaro.org> Message-id: 1386158099-9239-5-git-send-email-will.newton@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-12-10softfloat: Remove unused argument from MINMAX macro.Will Newton1-3/+3
The nan_exp argument is not used, so remove it. Signed-off-by: Will Newton <will.newton@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 1386158099-9239-4-git-send-email-will.newton@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2013-06-10softfloat: Fix shift128Right for shift counts 64..127Peter Maydell1-1/+1
shift128Right would give the wrong result for a shift count between 64 and 127. This was never noticed because all of our uses of this function are guaranteed not to use shift counts in this range. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Message-id: 1370186269-24353-1-git-send-email-peter.maydell@linaro.org Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2013-04-15fpu: Correct edgecase in float64_muladdPeter Maydell1-3/+9
In handling float64_muladd, if we end up doing a subtraction of the product and c, and the 128 bit result of this subtraction happens to have its most significant bit in bit 63, we weren't handling this correctly when attempting to normalize to put the most significant bit into bit 126. We would end up doing a right shift by a negative number (undefined behaviour in C) so at best we would return an incorrect result to the guest. MSB in bit 63 has to be handled as a special case separately from MSB in 0..62 and MSB in 63..126. (MSB in 127 is not possible.) Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2013-01-26softfloat: Handle float_muladd_negate_c when product is zeroRichard Sandiford1-2/+2
Honour float_muladd_negate_c in the case where the product is zero and c is nonzero. Previously we would fail to negate c. Seen in (and tested against) the gfortran testsuite on MIPS. Signed-off-by: Richard Sandiford <rdsandiford@googlemail.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2013-01-05softfloat: Implement uint64_to_float128Richard Henderson1-0/+8
Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2013-01-05softfloat: Fix uint64_to_float64Richard Henderson1-3/+10
The interface to normalizeRoundAndPackFloat64 requires that the high bit be clear. Perform one shift-right-and-jam if needed. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-12-19fpu: move public header file to include/fpuPaolo Bonzini2-639/+1
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2012-12-19misc: move include files to include/qemu/Paolo Bonzini1-1/+1
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2012-10-31softfloat: implement fused multiply-add NaN propagation for MIPSAurelien Jarno1-0/+27
Add a pickNaNMulAdd function for MIPS, implementing NaN propagation rules for MIPS fused multiply-add instructions. Cc: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-10-01fpu/softfloat.c: Return correctly signed values from uint64_to_float32Peter Maydell1-2/+2
The uint64_to_float32() conversion function was incorrectly always returning numbers with the sign bit set (ie negative numbers). Correct this so we return positive numbers instead. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
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