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2015-01-21disas/sparc: Remove unused data sparc_opcode_archs[]Peter Maydell1-32/+0
Remove sparc_opcode_archs and the macros which use it, because we don't use them in QEMU and they provoke clang warnings: disas/sparc.c:307:39: warning: unused variable 'sparc_opcode_archs' [-Wunused-const-variable] static const struct sparc_opcode_arch sparc_opcode_archs[] = ^ Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
2014-12-16disas/mips: disable unused mips16_to_32_reg_map[]Leon Alrae1-1/+2
This array is used by print_mips16_insn_arg() which is guarded by #if 0. Therefore doing the same with the array as it generates clang warnings. Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
2014-12-16disas/mips: remove unused mips_msa_control_names_numeric[32]Leon Alrae1-7/+0
Signed-off-by: Leon Alrae <leon.alrae@imgtec.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
2014-11-03disas/mips.c: disassemble MSA instructionsYongbok Kim1-2/+714
disassemble MIPS SIMD Architecture instructions Signed-off-by: Yongbok Kim <yongbok.kim@imgtec.com> Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
2014-11-03target-mips: add TLBINV supportLeon Alrae1-0/+2
For Standard TLB configuration (Config.MT=1): TLBINV invalidates a set of TLB entries based on ASID. The virtual address is ignored in the entry match. TLB entries which have their G bit set to 1 are not modified. TLBINVF causes all entries to be invalidated. Single TLB entry can be marked as invalid on TLB entry write by having EntryHi.EHINV set to 1. Signed-off-by: Leon Alrae <leon.alrae@imgtec.com> Reviewed-by: Yongbok Kim <yongbok.kim@imgtec.com>
2014-10-24disas/libvixl/a64/instructions-a64.h: Remove unused constantsChen Gang1-24/+0
The instructions-a64.h header defines a number of floating point constants whose initializers are function calls. gcc 5 will warn if these constants are not used by the C or C++ file which includes the header, because they imply a runtime cost. Since for the files QEMU uses from libvixl we don't use these constants at all, just remove them. Upstream intend to fix these by shifting to an 'extern const' in the header plus definition in a suitable source file, so we can drop this patch when we sync with the upcoming libvixl 1.7. The related compiling error: CXX disas/arm-a64.o In file included from /upstream/qemu/disas/libvixl/a64/disasm-a64.h:32:0, from disas/arm-a64.cc:20: disas/libvixl/a64/instructions-a64.h:98:13: error: 'vixl::kFP32PositiveInfinity' defined but not used [-Werror=unused-variable] const float kFP32PositiveInfinity = rawbits_to_float(0x7f800000); ^ disas/libvixl/a64/instructions-a64.h:99:13: error: 'vixl::kFP32NegativeInfinity' defined but not used [-Werror=unused-variable] const float kFP32NegativeInfinity = rawbits_to_float(0xff800000); ^ disas/libvixl/a64/instructions-a64.h:100:14: error: 'vixl::kFP64PositiveInfinity' defined but not used [-Werror=unused-variable] const double kFP64PositiveInfinity = ^ disas/libvixl/a64/instructions-a64.h:102:14: error: 'vixl::kFP64NegativeInfinity' defined but not used [-Werror=unused-variable] const double kFP64NegativeInfinity = ^ disas/libvixl/a64/instructions-a64.h:107:21: error: 'vixl::kFP64SignallingNaN' defined but not used [-Werror=unused-variable] static const double kFP64SignallingNaN = ^ disas/libvixl/a64/instructions-a64.h:109:20: error: 'vixl::kFP32SignallingNaN' defined but not used [-Werror=unused-variable] static const float kFP32SignallingNaN = rawbits_to_float(0x7f800001); ^ disas/libvixl/a64/instructions-a64.h:112:21: error: 'vixl::kFP64QuietNaN' defined but not used [-Werror=unused-variable] static const double kFP64QuietNaN = ^ disas/libvixl/a64/instructions-a64.h:114:20: error: 'vixl::kFP32QuietNaN' defined but not used [-Werror=unused-variable] static const float kFP32QuietNaN = rawbits_to_float(0x7fc00001); ^ disas/libvixl/a64/instructions-a64.h:117:21: error: 'vixl::kFP64DefaultNaN' defined but not used [-Werror=unused-variable] static const double kFP64DefaultNaN = ^ disas/libvixl/a64/instructions-a64.h:119:20: error: 'vixl::kFP32DefaultNaN' defined but not used [-Werror=unused-variable] static const float kFP32DefaultNaN = rawbits_to_float(0x7fc00000); ^ cc1plus: all warnings being treated as errors make: *** [disas/arm-a64.o] Error 1 Signed-off-by: Chen Gang <gang.chen.5i5j@gmail.com> [PMM: Rewrote the commit message a little] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-10-24disas/libvixl: Update to libvixl 1.6Peter Maydell12-332/+715
Update our copy of libvixl to upstream 1.6. There are no changes of any particular interest to QEMU, so this is simply keeping up with current upstream. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 1412091418-25744-1-git-send-email-peter.maydell@linaro.org
2014-10-14target-mips: remove JR, BLTZAL, BGEZAL and add NAL, BAL instructionsYongbok Kim1-0/+2
Signed-off-by: Yongbok Kim <yongbok.kim@imgtec.com> Signed-off-by: Leon Alrae <leon.alrae@imgtec.com> Reviewed-by: Aurelien Jarno <aurelien@aurel32.net>
2014-10-14target-mips: add new Floating Point Comparison instructionsYongbok Kim1-0/+44
Signed-off-by: Yongbok Kim <yongbok.kim@imgtec.com> Signed-off-by: Leon Alrae <leon.alrae@imgtec.com> Reviewed-by: Aurelien Jarno <aurelien@aurel32.net>
2014-10-14target-mips: add new Floating Point instructionsLeon Alrae1-0/+22
In terms of encoding MIPS32R6 MIN.fmt, MAX.fmt, MINA.fmt, MAXA.fmt replaced MIPS-3D RECIP1, RECIP2, RSQRT1, RSQRT2 instructions. In R6 all Floating Point instructions are supposed to be IEEE-2008 compliant i.e. FIR.HAS2008 always 1. However, QEMU softfloat for MIPS has not been updated yet. Signed-off-by: Leon Alrae <leon.alrae@imgtec.com> Reviewed-by: Yongbok Kim <yongbok.kim@imgtec.com>
2014-10-14target-mips: add AUI, LSA and PCREL instruction familiesLeon Alrae1-3/+39
Signed-off-by: Leon Alrae <leon.alrae@imgtec.com> Reviewed-by: Yongbok Kim <yongbok.kim@imgtec.com>
2014-10-13target-mips: add compact and CP1 branchesYongbok Kim1-3/+64
Introduce MIPS32R6 Compact Branch instructions which do not have delay slot - they have forbidden slot instead. However, current implementation does not support forbidden slot yet. Add also BC1EQZ and BC1NEZ instructions. Signed-off-by: Yongbok Kim <yongbok.kim@imgtec.com> Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
2014-10-13target-mips: add ALIGN, DALIGN, BITSWAP and DBITSWAP instructionsYongbok Kim1-0/+4
Signed-off-by: Yongbok Kim <yongbok.kim@imgtec.com> Signed-off-by: Leon Alrae <leon.alrae@imgtec.com> Reviewed-by: Aurelien Jarno <aurelien@aurel32.net>
2014-10-13target-mips: move CLO, DCLO, CLZ, DCLZ, SDBBP and free special2 in R6Leon Alrae1-0/+5
Also consider OPC_SPIM instruction as deleted in R6 because it is overlaping with MIPS32R6 SDBBP. Signed-off-by: Leon Alrae <leon.alrae@imgtec.com> Reviewed-by: Aurelien Jarno <aurelien@aurel32.net>
2014-10-13target-mips: redefine Integer Multiply and Divide instructionsLeon Alrae1-0/+16
Use "R6_" prefix in front of all new Multiply / Divide instructions for easier differentiation between R6 and preR6. Signed-off-by: Leon Alrae <leon.alrae@imgtec.com> Reviewed-by: Aurelien Jarno <aurelien@aurel32.net>
2014-10-13target-mips: move PREF, CACHE, LLD and SCD instructionsLeon Alrae1-0/+4
The encoding of PREF, CACHE, LLD and SCD instruction changed in MIPS32R6. Additionally, the hint codes in PREF instruction greater than or equal to 24 generate Reserved Instruction Exception. Signed-off-by: Leon Alrae <leon.alrae@imgtec.com> Reviewed-by: Aurelien Jarno <aurelien@aurel32.net>
2014-10-13target-mips: move LL and SC instructionsLeon Alrae1-1/+8
The encoding of LL and SC instruction has changed in MIPS32 Release 6. Signed-off-by: Leon Alrae <leon.alrae@imgtec.com> Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Reviewed-by: James Hogan <james.hogan@imgtec.com>
2014-10-13target-mips: add SELEQZ and SELNEZ instructionsLeon Alrae1-0/+8
Signed-off-by: Leon Alrae <leon.alrae@imgtec.com> Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Reviewed-by: James Hogan <james.hogan@imgtec.com>
2014-09-29tcg-sparc: Use UMULXHI instructionRichard Henderson1-0/+1
Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-09-29tcg-sparc: Rename ADDX/SUBX insnsRichard Henderson1-21/+11
The pre-v9 ADDX/SUBX insns were renamed ADDC/SUBC for v9. Standardizing on the v9 name makes things less confusing. Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-09-29tcg-sparc: Use ADDXC in addsub2_i64Richard Henderson1-0/+3
On T4 and newer Sparc chips we have an add-with-carry insn that takes its input from %xcc instead of %icc. Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-08-29disas/libvixl: Update to upstream VIXL 1.5Peter Maydell13-93/+558
Update our copy of libvixl to upstream's 1.5 release. This includes the upstream versions of the fixes we were carrying locally (commit ffebe899). Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 1407162987-4659-1-git-send-email-peter.maydell@linaro.org
2014-07-08disas/libvixl: prepend the include path of libvixl header filesStefano Stabellini1-1/+1
Currently the Makefile of disas/libvixl appends -I$(SRC_PATH)/disas/libvixl to QEMU_CFLAGS. As a consequence C++ files that #include "utils.h", such as disas/libvixl/a64/instructions-a64.cc, are going to look for utils.h on all the other include paths first. When building QEMU as part of the Xen make system, another unrelated utils.h file is going to be chosen for inclusion, causing a build failure: In file included from disas/libvixl/a64/instructions-a64.cc:27:0: /qemu/disas/libvixl/a64/instructions-a64.h:88:64: error: 'rawbits_to_float' was not declared in this scope const float kFP32PositiveInfinity = rawbits_to_float(0x7f800000); Fix the problem by prepending (rather than appending) the libvixl include path to QEMU_CFLAGS. Signed-off-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-06-29disas/libvixl: Fix wrong format stringsStefan Weil1-10/+10
When the compiler is told to check the arguments of AppendToOutput, it reports several errors of this kind: error: format ‘%d’ expects argument of type ‘int’, but argument 3 has type ‘int64_t {aka long int}’ [-Werror=format] Fix those bugs by using the correct format strings with PRId64, PRIx64. Signed-off-by: Stefan Weil <sw@weilnetz.de> Message-id: 1403113751-19799-1-git-send-email-sw@weilnetz.de Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-06-29disas/libvixl: Update README for version baseRichard Henderson1-1/+1
Signed-off-by: Richard Henderson <rth@redhat.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-05-13disas/libvixl: Update to libvixl 1.4Peter Maydell11-342/+628
Update our copy of libvixl to upstream's 1.4 release. Note that we no longer need any local fixes for compilation on 32 bit hosts -- they have all been integrated upstream. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 1399040419-9227-1-git-send-email-peter.maydell@linaro.org Acked-by: Richard Henderson <rth@twiddle.net>
2014-05-08build: convert some obj-specific CFLAGS to use new foo.o-cflags syntaxMichael Tokarev1-1/+1
Current Makefile system allows using foo.o-cflags variables to store object-specific CFLAGS. Convert some usages of old syntax (using QEMU_CFLAGS += construct) to the new syntax. Do not touch multifile modules for now, as build system isn't ready for this. Signed-off-by: Michael Tokarev <mjt@tls.msk.ru> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2014-03-10libvixl: Fix format strings for several int64_t valuesStefan Weil1-10/+10
"%d" or "%x" won't work on hosts where int values are smaller than 64 bit. Signed-off-by: Stefan Weil <sw@weilnetz.de> Message-id: 1394219753-26106-1-git-send-email-sw@weilnetz.de Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-02-17disas/i386: Disassemble ANDN/SHLX/SHRX/SHAXRichard Henderson1-14/+132
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-02-15libvixl: fix 64bit constants usageMichael Tokarev2-15/+21
Since commit 999b53ec8794f203964db3ecf939a3da5c4bc843: Author: Claudio Fontana <claudio.fontana@linaro.org> Date: Wed Feb 5 17:27:28 2014 +0000 disas: Implement disassembly output for A64 Use libvixl to implement disassembly output in debug logs for A64, for use with both AArch64 hosts and targets. disas/libvixl/ contains functions which uses 64bit constants without using appropriate suffixes, which fails on 32bits. Fix this by using ULL suffix. Signed-off-by: Michael Tokarev <mjt@tls.msk.ru> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-02-08disas: Implement disassembly output for A64Claudio Fontana3-0/+100
Use libvixl to implement disassembly output in debug logs for A64, for use with both AArch64 hosts and targets. Signed-off-by: Claudio Fontana <claudio.fontana@linaro.org> [PMM: * added support for target disassembly * switched to custom QEMUDisassembler so the output format matches what QEMU expects * make sure we correctly fall back to "just print hex" if we didn't build the AArch64 disassembler because of lack of a C++ compiler * rename from 'aarch64' to 'arm-a64' because this is a disassembler for the A64 instruction set * merge aarch64.c and aarch64-cxx.cc into one C++ file * simplify the aarch64.c<->aarch64-cxx.cc interface] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-02-08disas/libvixl: Fix upstream libvixl compilation issuesPeter Maydell3-18/+17
Fix various minor issues with upstream libvixl so that it will compile successfully on the platforms QEMU cares about: * remove unused GBytes constant (it clashes with the glib headers) * fix suffixes on constants to use 'LL' for 64 bit constants so we can compile on 32 bit hosts Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <rth@twiddle.net>
2014-02-08disas: Add subset of libvixl sources for A64 disassemblerPeter Maydell15-0/+6620
Add the subset of the libvixl sources that are needed for the A64 disassembler support. These sources come from https://github.com/armvixl/vixl commit 578645f14e122d2b which is VIXL release 1.1. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <rth@twiddle.net>
2014-01-25disas/i386.c: disassemble movbe instructionAurelien Jarno1-4/+4
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-09-02disas/ppc.c: Fix little endian disassemblyAnton Blanchard1-1/+2
Use info->endian to select the endian of the instruction to be disassembled. Signed-off-by: Anton Blanchard <anton@samba.org> Reviewed-by: Anthony Liguori <aliguori@us.ibm.com> Signed-off-by: Alexander Graf <agraf@suse.de>
2013-04-27tcg-arm: Implement division instructionsRichard Henderson1-0/+4
An armv7 extension implements division, present on Cortex A15. Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-04-13target-i386: add AES-NI instructionsAurelien Jarno1-2/+2
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@gmail.com> Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2013-04-13disas/i386.c: disassemble aes-ni instructionsAurelien Jarno1-6/+61
Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2013-04-13disas/i386.c: disassemble pclmulqdq instructionAurelien Jarno1-2/+11
Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2013-03-23Add moxie disassemblerAnthony Green2-0/+361
Signed-off-by: Anthony Green <green@moxielogic.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2013-03-18lm32-dis: fix NULL pointer dereferenceMichael Walle1-4/+4
Signed-off-by: Michael Walle <michael@walle.cc>
2013-02-23Replace all setjmp()/longjmp() with sigsetjmp()/siglongjmp()Peter Maydell2-8/+9
The setjmp() function doesn't specify whether signal masks are saved and restored; on Linux they are not, but on BSD (including MacOSX) they are. We want to have consistent behaviour across platforms, so we should always use "don't save/restore signal mask" (this is also generally going to be faster). This also works around a bug in MacOSX where the signal-restoration on longjmp() affects the signal mask for a completely different thread, not just the mask for the thread which did the longjmp. The most visible effect of this was that ctrl-C was ignored on MacOSX because the CPU thread did a longjmp which resulted in its signal mask being applied to every thread, so that all threads had SIGINT and SIGTERM blocked. The POSIX-sanctioned portable way to do a jump without affecting signal masks is to siglongjmp() to a sigjmp_buf which was created by calling sigsetjmp() with a zero savemask parameter, so change all uses of setjmp()/longjmp() accordingly. [Technically POSIX allows sigsetjmp(buf, 0) to save the signal mask; however the following siglongjmp() must not restore the signal mask, so the pair can be effectively considered as "sigjmp/longjmp which don't touch the mask".] For Windows we provide a trivial sigsetjmp/siglongjmp in terms of setjmp/longjmp -- this is OK because no user will ever pass a non-zero savemask. The setjmp() uses in tests/tcg/test-i386.c and tests/tcg/linux-test.c are left untouched because these are self-contained singlethreaded test programs intended to be run under QEMU's Linux emulation, so they have neither the portability nor the multithreading issues to deal with. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <rth@twiddle.net> Tested-by: Stefan Weil <sw@weilnetz.de> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2013-02-23disas/i386.c: Add explicit braces round empty for-loop bodyPeter Maydell1-1/+2
Add explicit braces round an empty for-loop body; this fits QEMU style and is easier to read than an inconspicuous semicolon at the end of the line. It also silences a clang warning: disas/i386.c:4723:49: warning: for loop has empty body [-Wempty-body] for (i = 0; tmp[i] == '0' && tmp[i + 1]; i++); ^ disas/i386.c:4723:49: note: put the semicolon on a separate line to silence this warning [-Wempty-body] Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2013-01-26build: remove universal-obj-yPaolo Bonzini1-15/+15
All of universal-obj-y, user-obj-y (right now unused) and common-obj-y can be unified into common-obj-y if we take care of defining CONFIG_SOFTMMU and CONFIG_USER_ONLY in the toplevel makefile. This is similar to how we define symbols for hardware components. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2013-01-05target-s390: Fix disassembly of cpsdrRichard Henderson1-1/+3
Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-01-05target-s390: Disassemble more z10 and z196 opcodesRichard Henderson1-18/+151
Also fix disassembly for COMPARE AND BRANCH. The table must be sorted by primary opcode, and several were out of place. Signed-off-by: Richard Henderson <rth@twiddle.net>
2013-01-02tci: Fix broken builds with TCG interpreterStefan Weil1-1/+3
TCI no longer compiled after commit 76cad71136b7eb371cf2a2a4e1621cfe8d9c769a. The TCI disassembler depends on data structures which are different for each QEMU target, so it cannot be compiled as a universal-obj today. Signed-off-by: Stefan Weil <sw@weilnetz.de> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-12-19build: kill libdis, move disassemblers to disas/Paolo Bonzini16-0/+52938
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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