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2016-05-12i.MX: Add i.MX6 SOC implementation.Jean-Christophe DUBOIS1-0/+1
For now we only support the following devices: * up to 4 Cortex A9 cores * A9 MPCORE (SCU, GIC, TWD) * 5 i.MX UARTs * 2 EPIT timers * 1 GPT timer * 3 I2C controllers * 7 GPIO controllers * 6 SDHC controllers * 5 SPI controllers * 1 CCM device * 1 SRC device * various ROM/RAM areas. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Jean-Christophe Dubois <jcd@tribudubois.net> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-03-30hw/gpio: Add the emulation of gpio_keyShannon Zhao1-0/+1
This will be used by ARM virt machine as a power button. Signed-off-by: Shannon Zhao <shannon.zhao@linaro.org> Message-id: 1458221140-15232-2-git-send-email-zhaoshenglong@huawei.com [PMM: Use hyphen rather than underscore in type names; add a comment briefly describing what the device does] Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-03-30hw/mips: implement ITC Configuration Tags and Storage CellsLeon Alrae1-0/+1
Implement ITC as a single object consisting of two memory regions: 1) tag_io: ITC Configuration Tags (i.e. ITCAddressMap{0,1} registers) which are accessible by the CPU via CACHE instruction. Also adding MemoryRegion *itc_tag to the CPUMIPSState so that CACHE instruction will dispatch reads/writes directly. 2) storage_io: memory-mapped ITC Storage whose address space is configurable (i.e. enabled/remapped/resized) by writing to ITCAddressMap{0,1} registers. ITC Storage contains FIFO and Semaphore cells. Read-only FIFO bit in the ITC cell tag indicates the type of the cell. If the ITC Storage contains both types of cells then FIFOs are located before Semaphores. Since issuing thread can get blocked on the access to a cell (in E/F Synchronized and P/V Synchronized Views) each cell has a bitmap to track which threads are currently blocked. Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
2016-03-30hw/mips: implement generic MIPS Coherent Processing System containerLeon Alrae1-0/+1
Implement generic MIPS Coherent Processing System (CPS) which in this commit just creates VPs, but it will serve as a container also for other components like Global Configuration Registers and Cluster Power Controller. Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
2016-03-24Merge remote-tracking branch 'remotes/lalrae/tags/mips-20160323' into stagingPeter Maydell5-120/+36
MIPS patches 2016-03-23 Changes: * add mips-softmmu-common.mak * indicate presence of IEEE 754-2008 FPU in MIPS64R6-generic and P5600 # gpg: Signature made Wed 23 Mar 2016 16:38:04 GMT using RSA key ID 0B29DA6B # gpg: Good signature from "Leon Alrae <leon.alrae@imgtec.com>" * remotes/lalrae/tags/mips-20160323: default-configs: add mips-softmmu-common.mak target-mips: indicate presence of IEEE 754-2008 FPU in R6/R5+MSA CPUs Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-03-23default-configs: add mips-softmmu-common.makLeon Alrae5-120/+36
Add mips-softmmu-common.mak and include it in existing mips*-softmmu.mak files to avoid having to repeat CONFIG defines four times. Suggested-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
2016-03-21event_notifier: Make event_notifier_init_fd() #ifdef CONFIG_EVENTFDMarkus Armbruster1-1/+1
Event notifiers are designed for eventfd(2). They can fall back to pipes, but according to Paolo, event_notifier_init_fd() really requires the real thing, and should therefore be under #ifdef CONFIG_EVENTFD. Do that. Its only user is ivshmem, which is currently CONFIG_POSIX. Narrow it to CONFIG_EVENTFD. Cc: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Message-Id: <1458066895-20632-6-git-send-email-armbru@redhat.com>
2016-03-16hw/timer: Add ASPEED timer device modelAndrew Jeffery1-0/+1
Implement basic ASPEED timer functionality for the AST2400 SoC[1]: Up to 8 timers can independently be configured, enabled, reset and disabled. Some hardware features are not implemented, namely clock value matching and pulse generation, but the implementation is enough to boot the Linux kernel configured with aspeed_defconfig. [1] http://www.aspeedtech.com/products.php?fPath=20&rId=376 Signed-off-by: Andrew Jeffery <andrew@aj.id.au> Message-id: 1458096317-25223-2-git-send-email-andrew@aj.id.au Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-02-09hw: Add support for LSI SAS1068 (mptsas) devicePaolo Bonzini1-0/+1
This adds the SAS1068 device, a SAS disk controller used in VMware that is oldish but widely supported and has decent performance. Unlike megasas, it presents itself as a SAS controller and not as a RAID controller. The device corresponds to the mptsas kernel driver in Linux. A few small things in the device setup are based on Don Slutz's old patch, but the device emulation was written from scratch based on Don's SeaBIOS patch and on the FreeBSD and Linux drivers. It is 2400 lines shorter than Don's patch (and roughly the same size as MegaSAS---also because it doesn't support the similar SPI controller), implements SCSI task management functions (with asynchronous cancellation), supports big-endian hosts, has complete support for migration and follows the QEMU coding standards much more closely. To write the driver, I first split Don's patch in two parts, with the configuration bits in one file and the rest in a separate file. I first left mptconfig.c in place and rewrote the rest, then deleted mptconfig.c as well. The configuration pages are still based mostly on VirtualBox's, though not exactly the same. However, the implementation is completely different. The contents of the pages themselves should not be copyrightable. Signed-off-by: Don Slutz <Don@CloudSwitch.com> Message-Id: <1347382813-5662-1-git-send-email-Don@CloudSwitch.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2016-02-03bcm2835_mbox: add BCM2835 mailboxesAndrew Baumann1-0/+1
This adds the system mailboxes which are used to communicate with a number of GPU peripherals on Pi/Pi2. Reviewed-by: Peter Crosthwaite <crosthwaite.peter@gmail.com> Signed-off-by: Andrew Baumann <Andrew.Baumann@microsoft.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-12-22nvdimm acpi: build ACPI NFIT tableXiao Guangrong2-0/+2
NFIT is defined in ACPI 6.0: 5.2.25 NVDIMM Firmware Interface Table (NFIT) Currently, we only support PMEM mode. Each device has 3 structures: - SPA structure, defines the PMEM region info - MEM DEV structure, it has the @handle which is used to associate specified ACPI NVDIMM device we will introduce in later patch. Also we can happily ignored the memory device's interleave, the real nvdimm hardware access is hidden behind host - DCR structure, it defines vendor ID used to associate specified vendor nvdimm driver. Since we only implement PMEM mode this time, Command window and Data window are not needed The NVDIMM functionality is controlled by the parameter, 'nvdimm', which is introduced for the machine, there is a example to enable it: -machine pc,nvdimm -m 8G,maxmem=100G,slots=100 -object \ memory-backend-file,id=mem1,share,mem-path=/tmp/nvdimm1,size=10G -device \ nvdimm,memdev=mem1,id=nv1 It is disabled on default Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com> Signed-off-by: Xiao Guangrong <guangrong.xiao@linux.intel.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2015-12-22nvdimm: implement NVDIMM device abstractXiao Guangrong2-0/+2
Introduce "nvdimm" device which is based on pc-dimm device type Currently, nothing is specific for nvdimm but hotplug is disabled Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com> Signed-off-by: Xiao Guangrong <guangrong.xiao@linux.intel.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2015-12-22ipmi: Add a BT low-level interfaceCorey Minyard2-0/+2
This provides the simulation of the BT hardware interface for IPMI. Signed-off-by: Corey Minyard <cminyard@mvista.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2015-12-22ipmi: Add an ISA KCS low-level interfaceCorey Minyard2-0/+2
This provides the simulation of the KCS hardware interface. Signed-off-by: Corey Minyard <cminyard@mvista.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2015-12-22ipmi: Add an external connection simulation interfaceCorey Minyard2-0/+2
This adds an interface for IPMI that connects to a remote BMC over a chardev (generally a TCP socket). The OpenIPMI lanserv simulator describes this interface, see that for interface details. Signed-off-by: Corey Minyard <cminyard@mvista.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2015-12-22ipmi: Add a local BMC simulationCorey Minyard2-0/+2
This provides a minimal local BMC, basically enough to comply with the spec and provide a complete watchdog timer (including a sensor, SDR, and event). Signed-off-by: Corey Minyard <cminyard@mvista.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2015-12-22Add a base IPMI interfaceCorey Minyard2-0/+2
Add the basic IPMI types and infrastructure to QEMU. Low-level interfaces and simulation interfaces will register with this; it's kind of the go-between to tie them together. Signed-off-by: Corey Minyard <cminyard@mvista.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2015-12-17hw/misc: Hyper-V test device 'hyperv-testdev'Andrey Smetanin2-0/+2
'hyperv-testdev' will be used by kvm-unit-tests to setup Hyper-V SynIC SINT's routing and to inject Hyper-V SynIC SINT's. Hyper-V test device is ISA type device that creates 0x3000 IO memory region and catches write access into it. Every write operation data decoded into ctl code and parameters for Hyper-V test device. Signed-off-by: Andrey Smetanin <asmetanin@virtuozzo.com> Reviewed-by: Roman Kagan <rkagan@virtuozzo.com> Signed-off-by: Denis V. Lunev <den@openvz.org> CC: Paolo Bonzini <pbonzini@redhat.com> CC: Richard Henderson <rth@twiddle.net> CC: Eduardo Habkost <ehabkost@redhat.com> CC: "Andreas Färber" <afaerber@suse.de> CC: Marcelo Tosatti <mtosatti@redhat.com> CC: Roman Kagan <rkagan@virtuozzo.com> CC: Denis V. Lunev <den@openvz.org> CC: kvm@vger.kernel.org Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2015-11-24default-configs/aarch64-linux-user.mak: Remove unused definePeter Maydell1-2/+0
The uses of the CONFIG_GDBSTUB_XML define were removed in commit b77abd95a9484c, but the define in aarch64-linux-user.mak somehow escaped the cull (the patchset probably crossed in the mail with the patches adding aarch64 support). Remove the stray define. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Laurent Desnogues <laurent.desnogues@gmail.com> Message-id: 1447690178-4560-1-git-send-email-peter.maydell@linaro.org
2015-10-24config: enable ivshmem on POSIXMarc-André Lureau1-1/+1
ivshmem doesn't actually require kvm, so enable it when POSIX is enabled. (it is required however when ioeventfd is enabled) Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
2015-10-20ppc/spapr: Allow VIRTIO_VGABenjamin Herrenschmidt1-0/+1
It works fine with the Linux driver out of the box Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2015-10-02icc_bus: drop the unused filesZhu Guihua2-2/+0
ICC bus impl has been droped, so all icc related files are not useful any more; delete them. Signed-off-by: Zhu Guihua <zhugh.fnst@cn.fujitsu.com> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2015-09-23spapr: Initialize hotplug memory address spaceBharata B Rao1-0/+1
Initialize a hotplug memory region under which all the hotplugged memory is accommodated. Also enable memory hotplug by setting CONFIG_MEM_HOTPLUG. Modelled on i386 memory hotplug. Signed-off-by: Bharata B Rao <bharata@linux.vnet.ibm.com> Reviewed-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2015-09-15target-tilegx: Add TILE-Gx building filesChen Gang1-0/+1
Add related configuration and make files for tilegx. The target can now build, though not run anything. Signed-off-by: Chen Gang <gang.chen.5i5j@gmail.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-Id: <BLU436-SMTP1588E5A03AD5E94B07E988B9660@phx.gbl> Signed-off-by: Richard Henderson <rth@twiddle.net>
2015-09-11virtio-vga: enable for i386Gerd Hoffmann1-0/+1
This one just syncs x86_64 and i386. Cc: Paolo Bonzini <pbonzini@redhat.com> Cc: qemu-trivial@nongnu.org Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
2015-09-07i.MX: Add SOC support for i.MX25Jean-Christophe Dubois1-0/+1
For now we support the following devices: * CPU: ARM926 * Interrupt Controller: AVIC * CCM * UART x 5 * EPIT x 2 * GPT x 4 * FEC * I2C x 3 Signed-off-by: Jean-Christophe Dubois <jcd@tribudubois.net> Reviewed-by: Peter Crosthwaite <crosthwaite.peter@gmail.com> Message-id: 62218bfa90f9101f79098e768c3d58bd92dcb7f3.1441057361.git.jcd@tribudubois.net Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-09-07i.MX: Add FEC Ethernet EmulatorJean-Christophe Dubois1-0/+1
This is based on mcf_fec.c FEC implementation for Coldfire * A generic PHY was added (borrowwed from LAN9118) * The buffer management is also modified as buffers are slightly different between Coldfire and i.MX Signed-off-by: Jean-Christophe Dubois <jcd@tribudubois.net> Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Message-id: fb314f8a120aa49f8f6ad886f312c649b484fb5a.1441057361.git.jcd@tribudubois.net Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-09-07i.MX: Add I2C controller emulatorJean-Christophe Dubois1-0/+2
The slave mode is not implemented. Signed-off-by: Jean-Christophe Dubois <jcd@tribudubois.net> Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Message-id: 508dbf2ebe26ec383d3a12a1db5a7890ac8acf20.1441057361.git.jcd@tribudubois.net Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-09-07i.MX: Add SOC support for i.MX31Jean-Christophe Dubois1-0/+2
For now we support the following devices: * CPU: ARM1136 * Interrupt Controller: AVIC * CCM * UART x 2 * EPIT x 2 * GPT Signed-off-by: Jean-Christophe Dubois <jcd@tribudubois.net> Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Message-id: f146d819594e41568daec42a1d0f440cdfe3df76.1441057361.git.jcd@tribudubois.net Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-09-07smbios: implement smbios support for mach-virtWei Huang1-0/+1
This patch generates smbios tables for ARM mach-virt. Also add CONFIG_SMBIOS=y for ARM default config. Acked-by: Gabriel Somlo <somlo@cmu.edu> Tested-by: Gabriel Somlo <somlo@cmu.edu> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Shannon Zhao <shannon.zhao@linaro.org> Tested-by: Leif Lindholm <leif.lindholm@linaro.org> Signed-off-by: Wei Huang <wei@redhat.com> Message-id: 1440615870-9518-3-git-send-email-wei@redhat.com [PMM: Added missing braces around an if().] Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-08-13smbios: move smbios code into a common folderWei Huang2-0/+2
To share smbios among different architectures, this patch moves SMBIOS code (smbios.c and smbios.h) from x86 specific folders into new hw/smbios directories. As a result, CONFIG_SMBIOS=y is defined in x86 default config files. Acked-by: Gabriel Somlo <somlo@cmu.edu> Tested-by: Gabriel Somlo <somlo@cmu.edu> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Tested-by: Leif Lindholm <leif.lindholm@linaro.org> Signed-off-by: Wei Huang <wei@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2015-07-07acpi: split out ICH ACPI supportMichael S. Tsirkin2-0/+2
MIPS doesn't need it, and including it creates problem as we are adding dependency on ISA LPC bridge. Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2015-06-16Merge remote-tracking branch 'remotes/kraxel/tags/pull-vga-20150615-1' into ↵Peter Maydell1-0/+1
staging virtio-gpu: pci support bits and virtio-vga. # gpg: Signature made Mon Jun 15 13:55:19 2015 BST using RSA key ID D3E87138 # gpg: Good signature from "Gerd Hoffmann (work) <kraxel@redhat.com>" # gpg: aka "Gerd Hoffmann <gerd@kraxel.org>" # gpg: aka "Gerd Hoffmann (private) <kraxel@gmail.com>" * remotes/kraxel/tags/pull-vga-20150615-1: virtio-vga: add vgabios configuration virtio-vga: add '-vga virtio' support virtio-vga: add virtio gpu device with vga compatibility virtio-gpu-pci: add virtio pci support virtio-gpu: fix error message Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-06-15Merge remote-tracking branch 'remotes/borntraeger/tags/s390x-20150615' into ↵Peter Maydell1-0/+1
staging s390x/kvm/watchdog 1. Implement a diag288 based watchdog 2. Fix virtio-ccw BIOS for gcc >= 4.9 # gpg: Signature made Mon Jun 15 12:36:25 2015 BST using RSA key ID B5A61C7C # gpg: Good signature from "Christian Borntraeger (IBM) <borntraeger@de.ibm.com>" * remotes/borntraeger/tags/s390x-20150615: s390/bios: build with -fdelete-null-pointer-checks watchdog: Add new Virtual Watchdog action INJECT-NMI nmi: Implement inject_nmi() for non-monitor context use s390x/watchdog: diag288 migration support s390x/kvm: diag288 instruction interception and handling s390x/watchdog: introduce diag288 watchdog device watchdog: change option wording to allow for more watchdogs Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-06-12virtio-vga: add virtio gpu device with vga compatibilityGerd Hoffmann1-0/+1
This patch adds a virtio-vga device. It is simliar to virtio-gpu-pci, but it also adds in vga compatibility, so guests without native virtio-gpu support can drive the device in vga mode. It is compatible with stdvga. Written by Dave Airlie and Gerd Hoffmann. Signed-off-by: Dave Airlie <airlied@redhat.com> Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2015-06-11s390x/watchdog: introduce diag288 watchdog deviceXu Wang1-0/+1
This patch introduces a new diag288 watchdog device that will, just like other watchdogs, monitor a guest and take corresponding actions when it detects that the guest is not responding. diag288 is s390x specific. The wiring to s390x KVM will be done in separate patches. Signed-off-by: Xu Wang <gesaint@linux.vnet.ibm.com> Reviewed-by: David Hildenbrand <dahi@linux.vnet.ibm.com> Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com> [split out qemu-option.hx base changes]
2015-06-11mips jazz: compile only in 64 bitHervé Poussineau4-10/+2
Remove now useless device models from other MIPS configurations We're now compiling 12 files less than before. Signed-off-by: Hervé Poussineau <hpoussin@reactos.org> Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
2015-05-29ACPI: split CONFIG_ACPI into 4 piecesShannon Zhao7-0/+19
As core.c, piix4.c, ich9.c and pcihp.c are for x86, add CONFIG_ACPI_X86 to make it only for x86. ARM doesn't support cpu and memory hotplug, add CONFIG_ACPI_CPU_HOTPLUG and CONFIG_ACPI_MEMORY_HOTPLUG to exclude them for target-arm. Signed-off-by: Shannon Zhao <zhaoshenglong@huawei.com> Signed-off-by: Shannon Zhao <shannon.zhao@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Message-id: 1432522520-8068-24-git-send-email-zhaoshenglong@huawei.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-05-18arm: Introduce Xilinx ZynqMP SoCPeter Crosthwaite1-1/+1
With quad Cortex-A53 CPUs. Use SMC PSCI, with the standard policy of secondaries starting in power-off. Tested-by: Alistair Francis <alistair.francis@xilinx.com> Reviewed-by: Alistair Francis <alistair.francis@xilinx.com> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Message-id: a16202a6c7b79e446e5289d38cb18d2ee4b897a0.1431381507.git.peter.crosthwaite@xilinx.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-05-11rocker: add new rocker switch deviceScott Feldman1-0/+1
Rocker is a simulated ethernet switch device. The device supports up to 62 front-panel ports and supports L2 switching and L3 routing functions, as well as L2/L3/L4 ACLs. The device presents a single PCI device for each switch, with a memory-mapped register space for device driver access. Rocker device is invoked with -device, for example a 4-port switch: -device rocker,name=sw1,len-ports=4,ports[0]=dev0,ports[1]=dev1, \ ports[2]=dev2,ports[3]=dev3 Each port is a netdev and can be paired with using -netdev id=<port name>. Signed-off-by: Scott Feldman <sfeldma@gmail.com> Signed-off-by: Jiri Pirko <jiri@resnulli.us> Acked-by: Scott Feldman <sfeldma@gmail.com> Acked-by: Jiri Pirko <jiri@resnulli.us> Signed-off-by: David Ahern <dsahern@gmail.com> Message-id: 1426306173-24884-7-git-send-email-sfeldma@gmail.com rocker: fix clang compiler errors Consolidate all forward typedef declarations to rocker.h. Signed-off-by: David Ahern <dsahern@gmail.com> Acked-by: Scott Feldman <sfeldma@gmail.com> Acked-by: Jiri Pirko <jiri@resnulli.us> rocker: add support for flow modification We had support for flow add/del. This adds support for flow mod. I needed this for L3 support where an existing route is modified using NLM_F_REPLACE. For example: ip route add 12.0.0.0/30 nexthop via 11.0.0.1 dev swp1 ip route change 12.0.0.0/30 nexthop via 11.0.0.9 dev swp2 The first cmd adds the route. The second cmd changes the existing route by changing its nexthop info. In the device, a mod operation results in the matching flow enty being modified with the new settings. This is atomic to the device. Signed-off-by: Scott Feldman <sfeldma@gmail.com> Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2015-04-30defconfigs: Piggyback microblazeel on microblazePeter Crosthwaite1-9/+1
Theres no difference in defconfig. Going forward microblazeel should superset microblaze so use an include. Signed-off-by: Peter Crosthwaite <crosthwaite.peter@gmail.com> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
2015-03-18hw/usb: Include USB files only if necessaryThomas Huth2-0/+2
Boards that do not include an USB controller should not provide USB devices. However, when running "qemu-system-s390x -device help" for example, there's still a usb-hub, usb-kbd, usb-mouse and usb-tablet in the list of "supported" devices. Let's fix that by compiling and linking the USB files only if it is really necessary. Signed-off-by: Thomas Huth <thuth@linux.vnet.ibm.com> Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2015-03-16s390x/config: Do not include full pci.makThomas Huth1-1/+2
pci.mak includes a lot of devices - and most of them do not make sense on s390x, like USB controllers or audio cards. These devices also show up when running "qemu-system-s390x -device help" and thus could raise the hope for the users that they could use these kind of devices with qemu-system-s390x. To avoid this confusion, we should not include pci.mak and rather include the bare minimum manually instead. Signed-off-by: Thomas Huth <thuth@linux.vnet.ibm.com> Acked-by: Frank Blaschka <blaschka@linux.vnet.ibm.com> Message-Id: <1426169954-6062-1-git-send-email-thuth@linux.vnet.ibm.com> Signed-off-by: Cornelia Huck <cornelia.huck@de.ibm.com>
2015-03-12configure: opengl overhaulGerd Hoffmann1-1/+1
Rename config option from "glx" to "opengl", glx will not be the only option for opengl in near future. Also switch over to pkg-config for opengl support detection. Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Reviewed-by: Max Reitz <mreitz@redhat.com>
2015-03-11stm32f205: Add the stm32f205 SoCAlistair Francis1-0/+1
This patch adds the stm32f205 SoC. This will be used by the Netduino 2 to create a machine. Signed-off-by: Alistair Francis <alistair@alistair23.me> Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Message-id: 48d509747a1ea0d8a7d5480560495e679990f9d2.1424175342.git.alistair@alistair23.me Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-03-11stm32f2xx_SYSCFG: Add the stm32f2xx SYSCFGAlistair Francis1-0/+1
This patch adds the stm32f2xx System Configuration Controller. This is used to configure what memory is mapped at address 0 (although that is not supported) as well as configure how the EXTI interrupts work (also not supported at the moment). This device is not required for basic examples, but more complex systems will require it (as well as the EXTI device) Signed-off-by: Alistair Francis <alistair@alistair23.me> Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Message-id: 5d499d7b60b61d5d6dcb310b2e55411b1f53794e.1424175342.git.alistair@alistair23.me Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-03-11stm32f2xx_USART: Add the stm32f2xx USART ControllerAlistair Francis1-0/+1
This patch adds the stm32f2xx USART controller (UART also uses the same controller). Signed-off-by: Alistair Francis <alistair@alistair23.me> Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Message-id: 762c6c0d2a41d574932bc4445ec9bfffe6da8798.1424175342.git.alistair@alistair23.me Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-03-11stm32f2xx_timer: Add the stm32f2xx TimerAlistair Francis1-0/+1
This patch adds the stm32f2xx timers: TIM2, TIM3, TIM4 and TIM5 to QEMU. Signed-off-by: Alistair Francis <alistair@alistair23.me> Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Message-id: 155091a323390f8da3cca496e4c611c493e62a77.1424175342.git.alistair@alistair23.me Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-03-09PPC: Remove duplicate OPENPIC defines in default-configsAlexander Graf2-2/+0
The CONFIG_OPENPIC variable was declared multiple times. We only need it once. Signed-off-by: Alexander Graf <agraf@suse.de>
2015-03-09ppc64-softmmu: Remove duplicated OPENPIC from configAlexey Kardashevskiy1-1/+0
Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru> Reviewed-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Alexander Graf <agraf@suse.de>
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-23 12:24:57 +0000