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2013-07-23cpu: Move singlestep_enabled field from CPU_COMMON to CPUStateAndreas Färber1-1/+1
Prepares for changing cpu_single_step() argument to CPUState. Acked-by: Michael Walle <michael@walle.cc> (for lm32) Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-07-23cpu: Introduce CPUClass::synchronize_from_tb() for cpu_pc_from_tb()Andreas Färber1-1/+7
Where no extra implementation is needed, fall back to CPUClass::set_pc(). Acked-by: Michael Walle <michael@walle.cc> (for lm32) Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-07-09log: Change log_cpu_state[_mask]() argument to CPUStateAndreas Färber1-3/+3
Since commit 878096eeb278a8ac1ccd6667af73e026f29b4cf5 (cpu: Turn cpu_dump_{state,statistics}() into CPUState hooks) CPUArchState is no longer needed. Add documentation and make the functions available through qemu/log.h outside NEED_CPU_H to allow use in qom/cpu.c. Moving them to qom/cpu.h was not yet possible due to convoluted include paths, so that some devices grow an implicit and unneeded dependency on qom/cpu.h for now. Acked-by: Michael Walle <michael@walle.cc> (for lm32) Reviewed-by: Richard Henderson <rth@twiddle.net> [AF: Simplified mb_cpu_do_interrupt() and do_interrupt_all() changes] Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-07-09target-i386: Change do_smm_enter() argument to X86CPUAndreas Färber1-1/+1
Prepares for log_cpu_state_mask() changing argument to CPUState. Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-07-09cpu: Replace cpu_single_env with CPUState current_cpuAndreas Färber1-6/+7
Move it to qom/cpu.h. Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-06-15target-i386/helper: remove DF macroliguang1-2/+2
Signed-off-by: liguang <lig.fnst@cn.fujitsu.com> Reviewed-by: Andreas Färber <afaerber@suse.de> Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2013-04-13Merge branch 'mingw' of git://qemu.weilnetz.de/qemuAurelien Jarno1-0/+8
* 'mingw' of git://qemu.weilnetz.de/qemu: qemu-timer: move timeBeginPeriod/timeEndPeriod to os-win32 Release SMP restriction on Windows Ensure good ordering of memory instruction in cpu_exec Check effective suspension of TCG thread
2013-04-12Ensure good ordering of memory instruction in cpu_execOlivier Hainque1-0/+8
The IO thread, when it senses cpu_single_env == 0, expects exit_request to be checked later on. A compiler scheduling constraint is not strong enough to ensure this on modern architecture. A memory fence is needed as well. Signed-off-by: Olivier Hainque <hainque@adacore.com> Signed-off-by: Fabien Chouteau <chouteau@adacore.com> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Stefan Weil <sw@weilnetz.de>
2013-04-12cpu-exec: Allow "-d exec" in non-debug builds (drop CONFIG_DEBUG_EXEC)Peter Maydell1-9/+6
The CONFIG_DEBUG_EXEC define compiles out a single qemu_log_mask() call, which is a pretty trivial cost even for something in the main cpu_exec() loop. Having this be conditionally defined means that '-d exec' on a non-debug build will silently do nothing. Drop the define and the configure machinery that sets it, in favour of just always allowing this log option to be enabled at runtime. As a concession to the mainloopiness, we use qemu_loglevel_mask()+qemu_log() rather than qemu_log_mask() to avoid the function call overhead. Note that DEBUG_DISAS is always defined, so removing the '|| defined(CONFIG_DEBUG_EXEC)' from those conditionals makes no behavioural change for that logging. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Acked-by: Edgar E. Iglesias <edgar.iglesias@gmail.com> Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2013-03-23target-i386: Don't modify env->eflags around cpu_dump_stateRichard Henderson1-3/+0
We can compute the value in cpu_dump_state anyway, and gratuitous modifications to eflags creates heisenbugs. Cc: Blue Swirl <blauwirbel@gmail.com> Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2013-03-23Add top level changes for moxieAnthony Green1-0/+2
Signed-off-by: Anthony Green <green@moxielogic.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2013-03-12cpu: Replace do_interrupt() by CPUClass::do_interrupt methodAndreas Färber1-16/+20
This removes a global per-target function and thus takes us one step closer to compiling multiple targets into one executable. It will also allow to override the interrupt handling for certain CPU families. Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-03-12cpu: Move halted and interrupt_request fields to CPUStateAndreas Färber1-16/+18
Both fields are used in VMState, thus need to be moved together. Explicitly zero them on reset since they were located before breakpoints. Pass PowerPCCPU to kvmppc_handle_halt(). Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-03-03Handle CPU interrupts by inline checking of a flagPeter Maydell1-1/+24
Fix some of the nasty TCG race conditions and crashes by implementing cpu_exit() as setting a flag which is checked at the start of each TB. This avoids crashes if a thread or signal handler calls cpu_exit() while the execution thread is itself modifying the TB graph (which may happen in system emulation mode as well as in linux-user mode with a multithreaded guest binary). This fixes the crashes seen in LP:668799; however there are another class of crashes described in LP:1098729 which stem from the fact that in linux-user with a multithreaded guest all threads will use and modify the same global TCG date structures (including the generated code buffer) without any kind of locking. This means that multithreaded guest binaries are still in the "unsupported" category. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2013-03-03cpu-exec: wrap tcg_qemu_tb_exec() in a fn to restore the PCPeter Maydell1-11/+18
If tcg_qemu_tb_exec() returns a value whose low bits don't indicate a link to an indexed next TB, this means that the TB execution never started (eg because the instruction counter hit zero). In this case the guest PC has to be reset to the address of the start of the TB. Refactor the cpu-exec code to make all tcg_qemu_tb_exec() calls pass through a wrapper function which does this restoration if necessary. Note that the apparent change in cpu_exec_nocache() from calling cpu_pc_from_tb() with the old TB to calling it with the TB returned by do_tcg_qemu_tb_exec() is safe, because in the nocache case we can guarantee that the TB we try to execute is not linked to any others, so the only possible returned TB is the one we started at. That is, we should arguably previously have included in cpu_exec_nocache() an assert(next_tb & ~TB_EXIT_MASK) == tb), since the API requires restore from next_tb but we were using tb. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2013-03-03tcg: Document tcg_qemu_tb_exec() and provide constants for low bit usesPeter Maydell1-4/+5
Document tcg_qemu_tb_exec(). In particular, its return value is a combination of a pointer to the next translation block and some extra information in the low two bits. Provide some #defines for the values passed in these bits to improve code clarity. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2013-02-23Replace all setjmp()/longjmp() with sigsetjmp()/siglongjmp()Peter Maydell1-3/+3
The setjmp() function doesn't specify whether signal masks are saved and restored; on Linux they are not, but on BSD (including MacOSX) they are. We want to have consistent behaviour across platforms, so we should always use "don't save/restore signal mask" (this is also generally going to be faster). This also works around a bug in MacOSX where the signal-restoration on longjmp() affects the signal mask for a completely different thread, not just the mask for the thread which did the longjmp. The most visible effect of this was that ctrl-C was ignored on MacOSX because the CPU thread did a longjmp which resulted in its signal mask being applied to every thread, so that all threads had SIGINT and SIGTERM blocked. The POSIX-sanctioned portable way to do a jump without affecting signal masks is to siglongjmp() to a sigjmp_buf which was created by calling sigsetjmp() with a zero savemask parameter, so change all uses of setjmp()/longjmp() accordingly. [Technically POSIX allows sigsetjmp(buf, 0) to save the signal mask; however the following siglongjmp() must not restore the signal mask, so the pair can be effectively considered as "sigjmp/longjmp which don't touch the mask".] For Windows we provide a trivial sigsetjmp/siglongjmp in terms of setjmp/longjmp -- this is OK because no user will ever pass a non-zero savemask. The setjmp() uses in tests/tcg/test-i386.c and tests/tcg/linux-test.c are left untouched because these are self-contained singlethreaded test programs intended to be run under QEMU's Linux emulation, so they have neither the portability nor the multithreading issues to deal with. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <rth@twiddle.net> Tested-by: Stefan Weil <sw@weilnetz.de> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2013-02-16cpu: Move current_tb field to CPUStateAndreas Färber1-5/+8
Explictly NULL it on CPU reset since it was located before breakpoints. Change vapic_report_tpr_access() argument to CPUState. This also resolves the use of void* for cpu.h independence. Change vAPIC patch_instruction() argument to X86CPU. Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-02-16cpu: Move exit_request field to CPUStateAndreas Färber1-4/+4
Since it was located before breakpoints field, it needs to be reset. Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-02-16TCG: Move translation block variables to new context inside tcg_ctx: tb_ctxEvgeny Voevodin1-10/+8
It's worth to clean-up translation blocks variables and move them into one context as was suggested by Swirl. Also if we use this context directly inside tcg_ctx, then it speeds up code generation a bit. Signed-off-by: Evgeny Voevodin <evgenyvoevodin@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-12-19softmmu: move include files to include/sysemu/Paolo Bonzini1-1/+1
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2012-12-19misc: move include files to include/qemu/Paolo Bonzini1-1/+1
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2012-12-19build: kill libdis, move disassemblers to disas/Paolo Bonzini1-1/+1
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2012-10-31cpus: Pass CPUState to [qemu_]cpu_has_work()Andreas Färber1-5/+3
For target-mips also change the return type to bool. Make include paths for cpu-qom.h consistent for alpha and unicore32. Signed-off-by: Andreas Färber <afaerber@suse.de> [AF: Updated new target-openrisc function accordingly] Acked-by: Richard Henderson <rth@twiddle.net> (for alpha)
2012-10-05cpu_dump_state: move DUMP_FPU and DUMP_CCOP flags from x86-only to genericPeter Maydell1-1/+1
Move the DUMP_FPU and DUMP_CCOP flags for cpu_dump_state() from being x86-specific flags to being generic ones. This allows us to drop some TARGET_I386 ifdefs in various places, and means that we can (potentially) be more consistent across architectures about which monitor commands or debug abort printouts include FPU register contents and info about QEMU's condition-code optimisations. Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2012-08-27Revert "i8259: add -no-spurious-interrupt-hack option"malc1-9/+5
This reverts commit f278d4947fff814dcde2ef2acad36d172ff8be35. Signed-off-by: malc <av1474@comtv.ru>
2012-08-24i8259: add -no-spurious-interrupt-hack optionMatthew Ogilvie1-5/+9
This patch provides a way to optionally suppress spurious interrupts, as a workaround for systems described below: Some old operating systems do not handle spurious interrupts well, and qemu tends to generate them significantly more often than real hardware. Examples: - Microport UNIX System V/386 v 2.1 (ca 1987) (The main problem I'm fixing: Without this patch, it panics sporadically when accessing the hard disk.) - AT&T UNIX System V/386 Release 4.0 Version 2.1a (ca 1991) See screenshot in "QEMU Official OS Support List": http://www.claunia.com/qemu/objectManager.php?sClass=application&iId=9 (I don't have this system to test.) - A report about OS/2 boot lockup from 2004 by Hampa Hug: http://lists.nongnu.org/archive/html/qemu-devel/2004-09/msg00367.html (My patch was partially inspired by his.) Also: http://lists.nongnu.org/archive/html/qemu-devel/2005-06/msg00243.html (I don't have this system to test.) Signed-off-by: Matthew Ogilvie <mmogilvi_qemu@miniinfo.net> Signed-off-by: malc <av1474@comtv.ru>
2012-08-11unicore32-softmmu: Make UniCore32 cpuid & exceptions correct and runableGuan Xuetao1-0/+1
This patch initializes the cpuid to exactly correct value because linux kernel will check it. In addition, the exception types are specified in proper situations. Then it could make exceptions generated correctly and timely. Signed-off-by: Guan Xuetao <gxt@mprc.pku.edu.cn> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-08-09Merge branch 'x86cpu_qom_tcg_v2' of git://github.com/imammedo/qemuBlue Swirl1-4/+1
* 'x86cpu_qom_tcg_v2' of git://github.com/imammedo/qemu: target-i386: move tcg initialization into x86_cpu_initfn() cleanup cpu_set_debug_excp_handler target-xtensa: drop usage of prev_debug_excp_handler target-i386: drop usage of prev_debug_excp_handler
2012-07-27target-or32: Add interrupt supportJia Liu1-0/+17
Add OpenRISC interrupt support. Signed-off-by: Jia Liu <proljc@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-07-27target-or32: Add target stubs and QOM cpuJia Liu1-0/+2
Add OpenRISC target stubs, QOM cpu and basic machine. Signed-off-by: Jia Liu <proljc@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-07-10apic: Defer interrupt updates to VCPU threadJan Kiszka1-0/+6
KVM performs TPR raising asynchronously to QEMU, specifically outside QEMU's global lock. When an interrupt is injected into the APIC and TPR is checked to decide if this can be delivered, a stale TPR value may be used, causing spurious interrupts in the end. Fix this by deferring apic_update_irq to the context of the target VCPU. We introduce a new interrupt flag for this, CPU_INTERRUPT_POLL. When it is set, the VCPU calls apic_poll_irq before checking for further pending interrupts. To avoid special-casing KVM, we also implement this logic for TCG mode. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Avi Kivity <avi@redhat.com>
2012-06-28x86: avoid AREG0 for exceptionsBlue Swirl1-4/+8
Add an explicit CPUX86State parameter instead of relying on AREG0. Merge raise_exception_env() to raise_exception(), likewise with raise_exception_err_env() and raise_exception_err(). Introduce cpu_svm_check_intercept_param() and cpu_vmexit() as wrappers. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-06-25cleanup cpu_set_debug_excp_handlerIgor Mammedov1-4/+1
There are no users left for previous exception handler returned from cpu_set_debug_excp_handler. It should simplify code a little. Signed-off-by: Igor Mammedov <imammedo@redhat.com>
2012-06-15cris: Fix NMI-flag handling on crisv10.Lars Persson1-5/+12
- The M-flag is encoded in different bits on cris v10 and cris v32. Signed-off-by: Lars Persson <larper@axis.com> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
2012-06-04cpu-exec: Use cpu_reset() in cpu_exec() for TARGET_PPCAndreas Färber1-1/+4
CPUState will be needed for all targets in the future, so place it into the main variable declaration block. Signed-off-by: Andreas Färber <afaerber@suse.de> Acked-by: Alexander Graf <agraf@suse.de>
2012-06-04target-i386: Pass X86CPU to do_cpu_{init,sipi}()Andreas Färber1-2/+2
Allows to use cpu_reset() in place of cpu_state_reset(). Signed-off-by: Andreas Färber <afaerber@suse.de> Reviewed-by: Igor Mammedov <imammedo@redhat.com>
2012-04-15cpu-exec: Remove non-portable type cast and fix format stringStefan Weil1-2/+2
This change is needed for w64, but also changes the code for other hosts. Signed-off-by: Stefan Weil <sw@weilnetz.de>
2012-03-30qtest: add test frameworkAnthony Liguori1-0/+1
The idea behind qtest is pretty simple. Instead of executing a CPU via TCG or KVM, rely on an external process to send events to the device model that the CPU would normally generate. qtest presents itself as an accelerator. In addition, a new option is added to establish a qtest server (-qtest) that takes a character device. This is what allows the external process to send CPU events to the device model. qtest uses a simple line based protocol to send the events. Documentation of that protocol is in qtest.c. I considered reusing the monitor for this job. Adding interrupts would be a bit difficult. In addition, logging would also be difficult. qtest has extensive logging support. All protocol commands are logged with time stamps using a new command line option (-qtest-log). Logging is important since ultimately, this is a feature for debugging. Signed-off-by: Anthony Liguori <aliguori@us.ibm.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-03-17w64: Fix data type of next_tb and tcg_qemu_tb_execStefan Weil1-3/+3
next_tb is the numeric value of a tcg target (= QEMU host) address. Using tcg_target_ulong instead of unsigned long shows this and makes the code portable for hosts with an unusual size of long (w64). The type cast '(long)(next_tb & ~3)' was not needed (casting unsigned long to long does not change the bits, and nor does casting long to pointer for most (= all non w64) hosts. It is removed here. Macro or function tcg_qemu_tb_exec is used to set next_tb. The function also returns next_tb. Therefore tcg_qemu_tb_exec must return a tcg_target_ulong. Signed-off-by: Stefan Weil <sw@weilnetz.de> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-03-14Rename CPUState -> CPUArchStateAndreas Färber1-8/+8
Scripted conversion: for file in *.[hc] hw/*.[hc] hw/kvm/*.[hc] linux-user/*.[hc] linux-user/m68k/*.[hc] bsd-user/*.[hc] darwin-user/*.[hc] tcg/*/*.[hc] target-*/cpu.h; do sed -i "s/CPUState/CPUArchState/g" $file done All occurrences of CPUArchState are expected to be replaced by QOM CPUState, once all targets are QOM'ified and common fields have been extracted. Signed-off-by: Andreas Färber <afaerber@suse.de> Reviewed-by: Anthony Liguori <aliguori@us.ibm.com>
2012-03-14Rename cpu_reset() to cpu_state_reset()Andreas Färber1-1/+1
Frees the identifier cpu_reset for QOM CPUs (manual rename). Don't hide the parameter type behind explicit casts, use static functions with strongly typed argument to indirect. Signed-off-by: Andreas Färber <afaerber@suse.de> Reviewed-by: Anthony Liguori <aliguori@us.ibm.com>
2012-03-14PPC: 405: Use proper CPU resetAlexander Graf1-2/+0
On ppc405ep there is a register that allows for software to reset the core, but not the whole system. Implement this reset using a reset interrupt. This gets rid of a bunch of #if 0'ed code. Reported-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Andreas Färber <afaerber@suse.de>
2012-02-10cpu-exec.c: Correct comment about this file and indentation cleanup陳韋任1-5/+5
Each target uses the #define macro (in target-xxx/cpu.h) to rename cpu_exec (cpu-exec.c) to cpu_xxx_exec, then defines its own cpu_loop which calls cpu_xxx_exec. So basically, cpu-exec.c is not only the i386 emulator main execution loop. This patch corrects the comment of this file and does indentation cleanup. Signed-off-by: Chen Wei-Ren (陳韋任) <chenwj@iis.sinica.edu.tw> Signed-off-by: Stefan Hajnoczi <stefanha@linux.vnet.ibm.com>
2011-10-06PPC: Fix sync instructions problem in SMPElie Richa1-0/+1
In the current emulation of the load-and-reserve (lwarx) and store-conditional (stwcx.) instructions, the internal reservation mechanism is taken into account, however each CPU has its own reservation information and this information is not synchronized between CPUs to perform proper synchronization. The following test case with 2 CPUs shows that the semantics of the "lwarx" and "stwcx." instructions are not preserved by the emulation. The test case does the following : - CPU0: reserve a memory location - CPU1: reserve the same memory location - CPU0: perform stwcx. on the location The last store-conditional operation succeeds while it is supposed to fail since the reservation was supposed to be lost at the second reserve operation. This (one line) patch fixes this problem in a very simple manner by removing the reservation of a CPU every time it is scheduled (in cpu_exec()). While this is a harsh workaround, it does not affect the guest code much because reservations are usually held for a very short time, that is an lwarx is almost always followed by an stwcx. a few instructions below. Therefore, in most cases, the reservation will be taken and consumed before a CPU switch occurs. However in the rare case where a CPU switch does occur between the lwarx and its corresponding stwcx. this patch solves a potential erroneous behavior of the synchronization instructions. Signed-off-by: Elie Richa <richa@adacore.com> Signed-off-by: Alexander Graf <agraf@suse.de>
2011-09-10target-xtensa: implement exceptionsMax Filippov1-0/+6
- mark privileged opcodes with ring check; - make debug exception on exception handler entry. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-09-10target-xtensa: add target stubsMax Filippov1-0/+2
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-09-10cpu-exec: remove unnecessary assignmentBlue Swirl1-2/+3
Avoid this warning from clang analyzer: /src/qemu/cpu-exec.c:97:5: warning: Value stored to 'phys_page2' is never read phys_page2 = -1; Adjust the scope of the variable while at it. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-07-12tcg: Reload local variables after return from longjmpJan Kiszka1-0/+4
Recent compilers look deep into cpu_exec, find longjmp as a noreturn function and decide to smash some stack variables as they won't be used again. This may lead to env becoming invalid after return from setjmp, causing crashes. Fix it by reloading env from cpu_single_env in that case. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-06-26cpu-exec.c: avoid AREG0 useBlue Swirl1-54/+20
Make functions take a parameter for CPUState instead of relying on global env. Pass CPUState pointer to TCG prologue, which moves it to AREG0. Thanks to Peter Maydell and Laurent Desnogues for the ARM prologue change. Revert the hacks to avoid AREG0 use on Sparc hosts. Move cpu_has_work() and cpu_pc_from_tb() from exec.h to cpu.h. Compile the file without HELPER_CFLAGS. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
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