| Age | Commit message (Expand) | Author | Files | Lines |
|---|
| 2008-04-13 | x86: Introduce CPU_INTERRUPT_NMI | aurel32 | 1 | -0/+6 |
| 2008-04-12 | HPPA (PA-RISC) host support | aurel32 | 1 | -0/+29 |
| 2008-04-11 | Fix compiler warnings | aurel32 | 1 | -0/+4 |
| 2008-03-14 | * Add a model of the ETRAX interrupt controller. | edgar_igl | 1 | -5/+0 |
| 2008-02-01 | reverted -translation option support | bellard | 1 | -62/+1 |
| 2008-02-01 | use the TCG code generator | bellard | 1 | -2/+2 |
| 2008-01-23 | Add option to disable TB cache, by Herve Poussineau. | ths | 1 | -1/+61 |
| 2007-12-11 | Partial fix to Sparc32 Linux host global register mangling problem | blueswir1 | 1 | -22/+52 |
| 2007-12-11 | Fix code generation buffer overflow reported by TeLeMan | blueswir1 | 1 | -1/+1 |
| 2007-12-02 | SH4: system emulator interrupt update, by Magnus Damm. | ths | 1 | -1/+4 |
| 2007-12-02 | SH4 delay slot code update, by Magnus Damm. | ths | 1 | -2/+2 |
| 2007-11-23 | Fix TB chaining for exceptions. | pbrook | 1 | -35/+17 |
| 2007-11-11 | consistent types for cpu_x86_fsave and cpu_x86_frstor | bellard | 1 | -4/+4 |
| 2007-11-11 | removed warning | bellard | 1 | -2/+2 |
| 2007-11-11 | ARMv7 support. | pbrook | 1 | -1/+12 |
| 2007-11-08 | removed obsolete x86 code copy support | bellard | 1 | -121/+5 |
| 2007-11-07 | CPU specific boot mode (Robert Reif) | blueswir1 | 1 | -4/+2 |
| 2007-10-14 | Replace is_user variable with mmu_idx in softmmu core, | j_mayer | 1 | -10/+9 |
| 2007-10-08 | CRIS support in toplevel, by Edgar E. Iglesias. | ths | 1 | -1/+61 |
| 2007-09-27 | SVM VINTR fix, by Alexander Graf. | ths | 1 | -3/+4 |
| 2007-09-24 | CPU boot mode | blueswir1 | 1 | -2/+3 |
| 2007-09-23 | SVM Support, by Alexander Graf. | ths | 1 | -2/+27 |
| 2007-09-20 | Extend TB flags to 64 bits (Alexander Graf). | j_mayer | 1 | -2/+2 |
| 2007-09-19 | Improve PowerPC target implementation, using computed hflags as TB flags. | j_mayer | 1 | -2/+1 |
| 2007-09-17 | find -type f | xargs sed -i 's/[\t ]*$//g' # Yes, again. Note the star in the... | ths | 1 | -18/+18 |
| 2007-09-16 | find -type f | xargs sed -i 's/[\t ]$//g' # on most files | ths | 1 | -74/+74 |
| 2007-09-06 | Partial support for 34K multithreading, not functional yet. | ths | 1 | -1/+1 |
| 2007-08-04 | Fix Sparc32 interrupt handling | blueswir1 | 1 | -0/+3 |
| 2007-06-03 | Add comment. | ths | 1 | -1/+1 |
| 2007-06-03 | Some more regs_to_env/envs_to_regs cleanup. | ths | 1 | -30/+6 |
| 2007-06-03 | Clean up of some target specifics in exec.c/cpu-exec.c. | ths | 1 | -63/+6 |
| 2007-05-29 | ColdFire EMAC support. | pbrook | 1 | -1/+3 |
| 2007-05-23 | m68k/ColdFire system emulation. | pbrook | 1 | -2/+16 |
| 2007-05-12 | Update debug output. | ths | 1 | -2/+2 |
| 2007-05-08 | Another bunch of mips host support. | ths | 1 | -1/+2 |
| 2007-05-05 | Some bits of Linux/MIPS host support, still segfaulty. | ths | 1 | -2/+16 |
| 2007-05-01 | Implement power state changes (IDLE and SLEEP) for PXA. | balrog | 1 | -9/+14 |
| 2007-04-09 | Implement embedded IRQ controller for PowerPC 6xx/740 & 750. | j_mayer | 1 | -7/+5 |
| 2007-04-05 | Integrate Alpha target in Qemu core. | j_mayer | 1 | -1/+70 |
| 2007-03-31 | Generate double and triple faults, by Bernhard Kauer. | ths | 1 | -0/+2 |
| 2007-03-30 | Sanitize mips exception handling. | ths | 1 | -3/+3 |
| 2007-03-30 | New model for PowerPC CPU hardware interrupt events: | j_mayer | 1 | -20/+6 |
| 2007-03-19 | Fix call to generated code on SPARC, by Juergen Keil. | ths | 1 | -0/+1 |
| 2007-03-16 | Watchpoint support (previous commit got eaten by Savannah server crash). | pbrook | 1 | -0/+5 |
| 2007-02-05 | Make cpu_signal_handler work on Mac OS X/Darwin x86 | bellard | 1 | -3/+15 |
| 2007-02-04 | Fix 64-bit host register corruption. | pbrook | 1 | -94/+9 |
| 2007-02-02 | Use target_ulong type for emulator registers. | ths | 1 | -3/+4 |
| 2007-01-31 | siginfo fix for Darwin/Mac OS X, by Pierre d'Herbemont. | ths | 1 | -9/+18 |
| 2007-01-24 | Reworking MIPS interrupt handling, by Aurelien Jarno. | ths | 1 | -1/+0 |
| 2006-12-07 | Spelling fixes, thanks to Stefan Weil. | ths | 1 | -1/+1 |
