summaryrefslogtreecommitdiff
AgeCommit message (Collapse)AuthorFilesLines
2015-03-10sun4u: switch m48t59 NVRAM to MMIO accessMark Cave-Ayland5-2/+8
Real sun4u systems memory-map the NVRAM on the (ISA) ebus, so switch over to MMIO from ioport access whilst setting the base year to 1968 as used by Sun systems. This allows all SPARC64 OSs included in my tests to correctly detect the NVRAM IC and read the hardware clock correctly upon boot. Note that this also requires a corresponding OpenBIOS update to r1330 in order to switch the SPARC64 NVRAM accessors over from ioport to MMIO. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
2015-03-10MAINTAINERS: add myself as SPARC maintainerMark Cave-Ayland1-0/+3
Acked-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
2015-03-10doc: minor updates to SPARC32 and SPARC64 documentationMark Cave-Ayland1-3/+4
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
2015-03-10m48t59: add m48t59 sysbus deviceMark Cave-Ayland1-0/+4
This is for subsequent use by the sun4u machine. Reviewed-by: Hervé Poussineau <hpoussin@reactos.org> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
2015-03-10m48t59: introduce new base-year qdev propertyMark Cave-Ayland6-18/+22
Currently the m48t59 device uses the hardware model in order to determine whether the year value is offset from the hardware value. As this will soon be required by the x59 model, create a qdev base-year property to represent the base year and update the callers appropriately. Reviewed-by: Hervé Poussineau <hpoussin@reactos.org> CC: Andreas Färber <afaerber@suse.de> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
2015-03-10m48t59: let init functions return a Nvram objectHervé Poussineau6-231/+177
Remove left-overs from header file. Move some functions only used by PReP to hw/ppc/prep.c Signed-off-by: Hervé Poussineau <hpoussin@reactos.org> CC: Andreas Färber <afaerber@suse.de> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
2015-03-10m48t59: add a Nvram interfaceHervé Poussineau2-0/+83
Signed-off-by: Hervé Poussineau <hpoussin@reactos.org> CC: Andreas Färber <afaerber@suse.de> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
2015-03-10m48t59: register a QOM type for each nvram type we supportHervé Poussineau1-77/+169
As m48t59 devices can only be created with m48t59_init() or m48t59_init_isa(), we know exactly which nvram types are required. Register only those three types. Remove .model and .size properties as they can be infered from nvram name. Rename type to 'isa-*' (and 'sysbus-*') to do like other devices ISA devices (isa-ide, isa-parallel, isa-serial...) Signed-off-by: Hervé Poussineau <hpoussin@reactos.org> CC: Andreas Färber <afaerber@suse.de> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
2015-03-10m48t59: move ISA ports/memory regions registration to QOM constructorHervé Poussineau1-12/+13
-device m48t59_isa can now be used to create a fully functional nvram. Signed-off-by: Hervé Poussineau <hpoussin@reactos.org> CC: Andreas Färber <afaerber@suse.de> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
2015-03-09Merge remote-tracking branch 'remotes/agraf/tags/signed-ppc-for-upstream' ↵Peter Maydell41-383/+1284
into staging Patch queue for ppc - 2015-03-09 This is my current patch queue for 2.3. Highlights include: * pseries: 2.3 machine * pseries: Export RTC via QOM * pseries: EEH support * mac: save/restore support * fix POWER5 hosts * random bug fixes # gpg: Signature made Mon Mar 9 14:00:53 2015 GMT using RSA key ID 03FEDC60 # gpg: Good signature from "Alexander Graf <agraf@suse.de>" # gpg: aka "Alexander Graf <alex@csgraf.de>" * remotes/agraf/tags/signed-ppc-for-upstream: (38 commits) target-ppc: Fix warnings from Sparse sPAPR: Implement sPAPRPHBClass EEH callbacks sPAPR: Implement EEH RTAS calls target-ppc: Add versions to server CPU descriptions PPC: Introduce the Virtual Time Base (VTB) SPR register PPC: Remove duplicate OPENPIC defines in default-configs ppc64-softmmu: Remove duplicated OPENPIC from config Revert "default-configs/ppc64: add all components of i82378 SuperIO chip used by prep" spapr_vio: Convert to realize() openpic: convert to vmstate openpic: switch IRQQueue queue from inline to bitmap openpic: fix up loadvm under -M mac99 openpic: fix segfault on -M mac99 savevm target-ppc: force update of msr bits in cpu_post_load target-ppc: move sdr1 value change detection logic to helper_store_sdr1() cuda.c: include adb_poll_timer in VMStateDescription adb.c: include ADBDevice parent state in KBDState and MouseState macio.c: include parent PCIDevice state in VMStateDescription display cpu id dump state Openpic: check that cpu id is within the number of cpus ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-03-09target-ppc: Fix warnings from SparseStefan Weil1-2/+3
Sparse report: target-ppc/mmu-hash64.c:353:9: warning: returning void-valued expression target-ppc/mmu-hash64.c:620:9: warning: returning void-valued expression Signed-off-by: Stefan Weil <sw@weilnetz.de> Signed-off-by: Alexander Graf <agraf@suse.de>
2015-03-09sPAPR: Implement sPAPRPHBClass EEH callbacksGavin Shan2-0/+116
The patch implements sPAPRPHBClass EEH callbacks so that the EEH RTAS requests can be routed to VFIO for further handling. Signed-off-by: Gavin Shan <gwshan@linux.vnet.ibm.com> Reviewed-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Alexander Graf <agraf@suse.de>
2015-03-09sPAPR: Implement EEH RTAS callsGavin Shan3-2/+316
The emulation for EEH RTAS requests from guest isn't covered by QEMU yet and the patch implements them. The patch defines constants used by EEH RTAS calls and adds callbacks sPAPRPHBClass::{eeh_set_option, eeh_get_state, eeh_reset, eeh_configure}, which are going to be used as follows: * RTAS calls are received in spapr_pci.c, sanity check is done there. * RTAS handlers handle what they can. If there is something it cannot handle and the corresponding sPAPRPHBClass callback is defined, it is called. * Those callbacks are only implemented for VFIO now. They do ioctl() to the IOMMU container fd to complete the calls. Error codes from that ioctl() are transferred back to the guest. [aik: defined RTAS tokens for EEH RTAS calls] Signed-off-by: Gavin Shan <gwshan@linux.vnet.ibm.com> Reviewed-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Alexander Graf <agraf@suse.de>
2015-03-09target-ppc: Add versions to server CPU descriptionsAlexey Kardashevskiy2-7/+9
5b79b1c "target-ppc: Create versionless CPU class per family if KVM" added a dynamic CPU class registration with the name of the CPU family which QEMU is running on. For example, this allowed specifying "-cpu POWER7" on every version of POWER7 machine, not just the one which POWER7 was an alias of. I.e. before 5b79b1c, "-cpu POWER7" would not work on real POWER7 2.1 and would work on POWER7 2.3 only. The same story for POWER8. However that patch broke POWER5+ support as POWER5+ CPU uses the same name as the CPU class so dynamic registering of the POWER5+ class failed. This redefines POWER5+ server CPUs by adding a version to them and adding an alias for TCG case. KVM will use dynamically registered CPUs. While we are here, do the same for 970 CPU. Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru> Signed-off-by: Alexander Graf <agraf@suse.de>
2015-03-09PPC: Introduce the Virtual Time Base (VTB) SPR registerCyril Bur2-0/+11
This patch adds basic support for the VTB. PowerISA: The Virtual Time Base (VTB) is a 64-bit incrementing counter. Virtual Time Base increments at the same rate as the Time Base until its value becomes 0xFFFF_FFFF_FFFF_FFFF (2 64 - 1); at the next increment its value becomes 0x0000_0000_0000_0000. There is no interrupt or other indication when this occurs. The operation of the Virtual Time Base has the following additional properties. 1. Loading a GPR from the Virtual Time Base has no effect on the accuracy of the Virtual Time Base. 2. Copying the contents of a GPR to the Virtual Time Base replaces the contents of the Virtual Time Base with the contents of the GPR. Signed-off-by: Cyril Bur <cyril.bur@au1.ibm.com> Signed-off-by: Alexander Graf <agraf@suse.de>
2015-03-09PPC: Remove duplicate OPENPIC defines in default-configsAlexander Graf2-2/+0
The CONFIG_OPENPIC variable was declared multiple times. We only need it once. Signed-off-by: Alexander Graf <agraf@suse.de>
2015-03-09ppc64-softmmu: Remove duplicated OPENPIC from configAlexey Kardashevskiy1-1/+0
Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru> Reviewed-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Alexander Graf <agraf@suse.de>
2015-03-09Revert "default-configs/ppc64: add all components of i82378 SuperIO chip ↵Alexey Kardashevskiy1-6/+0
used by prep" This reverts commit 9c9984242ce46ccf8636f5c19e81d794e84aa0c7 as even when it was applied, all supposedly new config options were already enabled. Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru> Reviewed-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Alexander Graf <agraf@suse.de>
2015-03-09spapr_vio: Convert to realize()Markus Armbruster6-38/+27
Bonus fix: always set an error on failure. Some failures were silent before, except for the generic error set by device_realize(). Signed-off-by: Markus Armbruster <armbru@redhat.com> Signed-off-by: Alexander Graf <agraf@suse.de>
2015-03-09openpic: convert to vmstateMark Cave-Ayland1-134/+119
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Alexander Graf <agraf@suse.de> Reviewed-by: Juan Quintela <quintela@redhat.com> Signed-off-by: Alexander Graf <agraf@suse.de>
2015-03-09openpic: switch IRQQueue queue from inline to bitmapMark Cave-Ayland1-9/+16
This is in preparation for using VMSTATE_BITMAP in a followup vmstate migration patch. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Signed-off-by: Alexander Graf <agraf@suse.de>
2015-03-09openpic: fix up loadvm under -M mac99Mark Cave-Ayland1-5/+3
Issuing loadvm under -M mac99 would fail for two reasons: firstly an incorrect version number for openpic would cause openpic_load() to abort, and secondly a cut/paste error when restoring the IVPR and IDR registers caused subsequent vmstate sections to become misaligned and abort early. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Signed-off-by: Alexander Graf <agraf@suse.de>
2015-03-09openpic: fix segfault on -M mac99 savevmMark Cave-Ayland1-1/+1
A simple copy/paste error causes savevm on -M mac99 to segfault. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Signed-off-by: Alexander Graf <agraf@suse.de>
2015-03-09target-ppc: force update of msr bits in cpu_post_loadMark Cave-Ayland1-1/+7
Since env->msr has already been restored by the time cpu_post_load is called, make sure that ppc_store_msr() is explicitly called with all msr bits except MSR_TGPR marked as invalid. This solves the issue where MSR flags aren't set correctly when restoring a VM snapshot, in particular the internal env->excp_prefix value when MSR_EP has been altered by a guest. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Signed-off-by: Alexander Graf <agraf@suse.de>
2015-03-09target-ppc: move sdr1 value change detection logic to helper_store_sdr1()Mark Cave-Ayland2-21/+21
Otherwise when cpu_post_load calls ppc_store_sdr1() when restoring a VM snapshot the value is deemed unchanged and so the internal env->htab* variables aren't set correctly. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Alexander Graf <agraf@suse.de>
2015-03-09cuda.c: include adb_poll_timer in VMStateDescriptionMark Cave-Ayland1-2/+3
Make sure that we include the adb_poll_timer when saving the VM state for client OSs that use it, e.g. Darwin. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Signed-off-by: Alexander Graf <agraf@suse.de>
2015-03-09adb.c: include ADBDevice parent state in KBDState and MouseStateMark Cave-Ayland1-4/+18
The parent ADBDevice contains the device id on the ADB bus. Make sure that this state is included in both its subclasses since some clients (such as OpenBIOS) reprogram each device id after enumeration. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Signed-off-by: Alexander Graf <agraf@suse.de>
2015-03-09macio.c: include parent PCIDevice state in VMStateDescriptionMark Cave-Ayland1-0/+24
This ensures that the macio PCI device is correctly configured when restoring from a VM snapshot. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Signed-off-by: Alexander Graf <agraf@suse.de>
2015-03-09display cpu id dump stateTristan Gingold1-2/+3
Signed-off-by: Fabien Chouteau <chouteau@adacore.com> Signed-off-by: Alexander Graf <agraf@suse.de>
2015-03-09Openpic: check that cpu id is within the number of cpusFabien Chouteau1-2/+2
Signed-off-by: Fabien Chouteau <chouteau@adacore.com> Signed-off-by: Alexander Graf <agraf@suse.de>
2015-03-09pseries: Switch VGA endian on H_SET_MODEDavid Gibson3-0/+31
When the guest switches the interrupt endian mode, which essentially means a global machine endian switch, we want to change the VGA framebuffer endian mode as well in order to be backward compatible with existing guests who don't know about the new endian control register. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Reviewed-by: Michael Roth <mdroth@linux.vnet.ibm.com> Signed-off-by: Alexander Graf <agraf@suse.de>
2015-03-09vga: Expose framebuffer byteorder as a QOM propertyDavid Gibson1-0/+29
The VGA device model now supports having the framebuffer in either endian, and can be switched between these by the guest via a register in the qext region. However, in some cases (e.g. LE OS on the pseries machine) we have existing guest that don't know about the endian switch register, but other parts of the qemu code have better information to set a default endianness than the VGA code does of itself. In order to allow them to set a correct default endianness in these cases, without breaking abstraction walls, this patch exposes the VGA framebuffer endianness via a writable QOM property. Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Reviewed-by: Gerd Hoffmann <kraxel@redhat.com> [agraf: use instance_init for property exposure] Signed-off-by: Alexander Graf <agraf@suse.de>
2015-03-09spapr: Clean up misuse of qdev_init() in xics-kvm creationMarkus Armbruster1-13/+12
We call try_create_xics() to create a "xics-kvm". If it fails, we call it again to fall back to plain "xics". try_create_xics() uses qdev_init(). qdev_init()'s error handling has an unwanted side effect: it calls qerror_report_err(), which prints to stderr. Looks like an error, but isn't. In QMP context, it would stash the error in the monitor instead, making the QMP command fail. Fortunately, it's only called from board initialization, never in QMP context. Clean up by cutting out the qdev_init() middle-man: set property "realized" directly. While there, improve the error message when we can't satisfy an explicit user request for "xics-kvm", and exit(1) instead of abort(). Simplify the abort when we can't create "xics". Signed-off-by: Markus Armbruster <armbru@redhat.com> [agraf: squash in fix for uninitialized variable from mdroth] Signed-off-by: Alexander Graf <agraf@suse.de>
2015-03-09PPC: Clean up misuse of qdev_init() in kvm-openpic creationMarkus Armbruster1-9/+11
We call ppce500_init_mpic_kvm() to create a "kvm-openpic". If it fails, we call ppce500_init_mpic_qemu() to fall back to plain "openpic". ppce500_init_mpic_kvm() uses qdev_init(). qdev_init()'s error handling has an unwanted side effect: it calls qerror_report_err(), which prints to stderr. Looks like an error, but isn't. In QMP context, it would stash the error in the monitor instead, making the QMP command fail. Fortunately, it's only called from board initialization, never in QMP context. Clean up by cutting out the qdev_init() middle-man: set property "realized" directly. While there, improve the error message when we can't satisfy an explicit user request for "kvm-openpic", and exit(1) instead of abort(). Signed-off-by: Markus Armbruster <armbru@redhat.com> Signed-off-by: Alexander Graf <agraf@suse.de>
2015-03-09pseries: Export RTC time via QOMDavid Gibson2-0/+10
On x86, the guest's RTC can be read with QMP, either from the RTC device's "date" property or via the "rtc-time" property on the machine (which is an alias to the former). This is set up in the mc146818rtc driver, and doesn't work on other targets. This patch adds a similar "date" property to the pseries machine's RTAS RTC and adds a compatible alias to the machine. Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Alexander Graf <agraf@suse.de>
2015-03-09pseries: Move rtc_offset into RTC device's state structureDavid Gibson3-8/+66
The initial creation of the PAPR RTC qdev class left a wart - the rtc's offset was left in the sPAPREnvironment structure, accessed via a global. This patch moves it into the RTC device's own state structure, were it belongs. This requires a small change to the migration stream format. In order to handle incoming streams from older versions, we also need to retain the rtc_offset field in the sPAPREnvironment structure, so that it can be loaded into via the vmsd, then pushed into the RTC device. Since we're changing the migration format, this also takes the opportunity to: * Change the rtc offset from a value in seconds to a value in nanoseconds, allowing nanosecond offsets between host and guest rtc time, if desired. * Remove both the already unused "next_irq" field and now unused "rtc_offset" field from the new version of the spapr migration stream Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Alexander Graf <agraf@suse.de>
2015-03-09pseries: Make the PAPR RTC a qdev deviceDavid Gibson4-7/+61
At present the PAPR RTC isn't a "device" as such - it's accessed only via firmware/hypervisor calls, and is handled in the sPAPR core code. This becomes inconvenient as we extend it in various ways. This patch makes the PAPR RTC a separate device in the qemu device model. For now, the only piece of device state - the rtc_offset - is still kept in the global sPAPREnvironment structure. That's clearly wrong, but leaving it to be fixed in a following patch makes for a clearer separation between the internal re-organization of the device, and the behavioural changes (because the migration stream format needs to change slightly when the offset is moved into the device's own state). Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Alexander Graf <agraf@suse.de>
2015-03-09pseries: Make RTAS time of day functions respect -rtc optionsDavid Gibson1-4/+36
In the 'pseries' machine the real time clock is provided by a paravirtualized firmware interface rather than a device per se; the RTAS get-time-of-day and set-time-of-day calls. Out current implementations of those work directly off host time (with an offset), not respecting options such as clock=vm which can be specified in the -rtc command line option. This patch reworks the RTAS RTC code to respect those options, primarily by basing them on the qemu_clock_get_ns(rtc_clock) function instead of directly on qemu_get_timedate() (which essentially handles host time, not virtual rtc time). As a bonus, this means our get-time-of-day function now also returns nanoseconds. Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Alexander Graf <agraf@suse.de>
2015-03-09pseries: Add spapr_rtc_read() helper functionDavid Gibson3-3/+13
The virtual RTC time is used in two places in the pseries machine. First is in the RTAS get-time-of-day function which returns the RTC time to the guest. Second is in the spapr events code which is used to timestamp event messages from the hypervisor to the guest. Currently both call qemu_get_timedate() directly, but we want to change that so we can properly handle the various -rtc options. In preparation, create a helper function to return the virtual RTC time. Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Alexander Graf <agraf@suse.de>
2015-03-09pseries: Add more parameter validation in RTAS time of day functionsDavid Gibson1-1/+6
Currently, the RTAS time of day functions only partially validate the number of parameters they receive and return. Because of how the parameters are used, this is unlikely to lead to a crash, but it's messy. This patch adds the missing checks. Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Alexander Graf <agraf@suse.de>
2015-03-09pseries: Move sPAPR RTC code into its own fileDavid Gibson5-50/+88
At the moment the RTAS (firmware/hypervisor) time of day functions are implemented in spapr_rtas.c along with a bunch of other things. Since we're going to be expanding these a bit, move the RTAS RTC related code out into new file spapr_rtc.c. Also add its own initialization function, spapr_rtc_init() called from the main machine init routine. Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Alexander Graf <agraf@suse.de>
2015-03-09Add more VMSTATE_*_TEST variants for integersDavid Gibson1-0/+15
Currently, vmstate.h includes helper macro variants for 8, 16 and 32-bit unsigned integers which include a "test" function which can selectively enable or disable the field's presence in the migration stream. There aren't similar helpers for 64-bit unsigned integers, or any size of signed integers. This patch remedies this. Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Alexander Graf <agraf@suse.de>
2015-03-09Generalize QOM publishing of date and time from mc146818rtc.cDavid Gibson3-41/+96
The mc146818rtc driver exposes the current RTC date and time via the "date" property in QOM (which is also aliased to the machine's "rtc-time" property). Currently it uses a custom visitor function rtc_get_date to do this. This patch introduces new helpers to the QOM core to expose struct tm valued properties via a getter function, so that this functionality can be more easily duplicated in other RTC implementations. Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Alexander Graf <agraf@suse.de>
2015-03-09spapr-pci: Enable huge BARsAlexey Kardashevskiy3-5/+32
At the moment sPAPR only supports 512MB window for MMIO BARs. However modern devices might want bigger 64bit BARs. This extends MMIO window from 512MB to 62GB (aligned to SPAPR_PCI_WINDOW_SPACING) and advertises it in 2 records in the PHB "ranges" property. 32bit gets the space from SPAPR_PCI_MEM_WIN_BUS_OFFSET till the end of 4GB, 64bit gets the rest of the space. If no space is left, 64bit range is not advertised. The MMIO space size is set to old value of 0x20000000 by default for pseries machines older than 2.3. The approach changes the device tree which is a guest visible change, however it won't break migration as: 1. we do not support migration to older QEMU versions 2. migration to newer QEMU will migrate the device tree as well and since the new layout only extends the old one and does not change address mappigns, no breakage is expected here too. SLOF change is required to utilize this extension. Suggested-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru> Reviewed-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Alexander Graf <agraf@suse.de>
2015-03-09spapr: Add pseries-2.3 machineAlexey Kardashevskiy1-2/+17
The next patch will make MMIO space bigger and keep the old value for older pseries machines. Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru> Reviewed-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Alexander Graf <agraf@suse.de>
2015-03-09pseries: Limit PCI host bridge "index" valueDavid Gibson2-2/+10
pseries guests can have large numbers of PCI host bridges. To avoid the user having to specify a number of different configuration values for every one, the device supports an "index" property which is a shorthand setting the various window and configuration addresses from a predefined sensible set. There are some problems with the details at present: * The "index" propery is signed, but negative values will create PCI windows below where we expect, potentially colliding with other devices * No limit is imposed on the "index" property and large values can translate to extremely large window addresses. With PCI passthrough in particular this can mean we exceed various mapping and physical address limits causing the guest host bridge to not work in strange ways. This patch addresses this, by making "index" unsigned, and imposing a limit. Currently the limit allows indices from 0..255 which is probably enough host bridges for the time being. It's fairly easy to extend if we discover we need more. Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Michael Roth <mdroth@linux.vnet.ibm.com> Signed-off-by: Alexander Graf <agraf@suse.de>
2015-03-09target-ppc: Use right page size with hash table lookupAneesh Kumar K.V3-11/+30
We look at two sizes specified in ISA (4K, 64K). If not found matching, we consider it 16MB. Without this patch we would fail to lookup address above 16MB range. Below 16MB happened to work before because the kernel have a liner mapping and we always looked up hash for 0xc000000000000000. The actual real address was computed by using the 16MB offset with the real address found with the above hash. Without Fix: (gdb) x/16x 0xc000000001000000 0xc000000001000000 <list_entries+453208>: Cannot access memory at address 0xc000000001000000 (gdb) With Fix: (gdb) x/16x 0xc000000001000000 0xc000000001000000 <list_entries+453208>: 0x00000000 0x00000000 0x00000000 0x00000000 0xc000000001000010 <list_entries+453224>: 0x00000000 0x00000000 0x00000000 0x00000000 0xc000000001000020 <list_entries+453240>: 0x00000000 0x00000000 0x00000000 0x00000000 0xc000000001000030 <list_entries+453256>: 0x00000000 0x00000000 0x00000000 0x00000000 Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com> Reviewed-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Alexander Graf <agraf@suse.de>
2015-03-09spapr_vio/spapr_iommu: Move VIO bypass where it belongsAlexey Kardashevskiy4-13/+47
Instead of tweaking a TCE table device by adding there a bypass flag, let's add an alias to RAM and IOMMU memory region, and enable/disable those according to the selected bypass mode. This way IOMMU memory region can have size of the actual window rather than ram_size which is essential for upcoming DDW support. This moves bypass logic to VIO layer and keeps @bypass flag in TCE table for migration compatibility only. This replaces spapr_tce_set_bypass() calls with explicit assignment to avoid confusion as the function could do something more that just syncing the @bypass flag. This adds a pointer to VIO device into the sPAPRTCETable struct to provide the sPAPRTCETable device a way to update bypass mode for the VIO device. Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru> Reviewed-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Alexander Graf <agraf@suse.de>
2015-03-09Merge remote-tracking branch 'remotes/mst/tags/for_upstream' into stagingPeter Maydell155-5289/+3587
pci, pc, virtio fixes and cleanups A bunch of fixes all over the place. All of ACPI refactoring has been merged. Legacy pci commands have been dropped. virtio header cleanup initial patches from virtio-1.0 branch Signed-off-by: Michael S. Tsirkin <mst@redhat.com> * remotes/mst/tags/for_upstream: (130 commits) acpi: drop unused code aml-build: comment fix acpi-build: fix typo in comment acpi: update generated files vhost user:support vhost user nic for non msi guests aml-build: fix build for glib < 2.22 acpi: update generated files Makefile.target: binary depends on config-devices acpi-test-data: update after pci rewrite acpi, mem-hotplug: use PC_DIMM_SLOT_PROP in acpi_memory_plug_cb(). pci-hotplug-old: Has been dead for five major releases, bury pci: Give a few helpers internal linkage acpi: make build_*() routines static to aml-build.c pc: acpi: remove not used anymore ssdt-[misc|pcihp].hex.generated blobs pc: acpi-build: drop template patching and create PCI bus tree dynamically tests: ACPI: update pc/SSDT.bridge due to new alg of PCI tree creation pc: acpi-build: simplify PCI bus tree generation tests: add ACPI blobs for qemu with bridge cases tests: bios-tables-test: add support for testing bridges tests: ACPI test blobs update due to PCI0._CRS changes ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Conflicts: hw/pci/pci-hotplug-old.c
2015-03-08Merge remote-tracking branch 'remotes/xtensa/tags/20150307-xtensa' into stagingPeter Maydell4-2/+38
Xtensa updates: - implement do_unassigned_access callback; - fix ML605 xtfpga FLASH size. # gpg: Signature made Sat Mar 7 12:35:05 2015 GMT using RSA key ID F83FA044 # gpg: Good signature from "Max Filippov <max.filippov@cogentembedded.com>" # gpg: aka "Max Filippov <jcmvbkbc@gmail.com>" * remotes/xtensa/tags/20150307-xtensa: target-xtensa: xtfpga: fix ml605 flash size target-xtensa: implement do_unassigned_access callback hw/xtensa: allow reads/writes in the system I/O region Signed-off-by: Peter Maydell <peter.maydell@linaro.org>