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2011-10-20migration: change has_error to contain errno valuesJuan Quintela6-14/+15
We normally already have an errno value. When not, abuse EIO. Signed-off-by: Juan Quintela <quintela@redhat.com>
2011-10-20migration: set error if select return one errorJuan Quintela1-0/+4
Signed-off-by: Juan Quintela <quintela@redhat.com> Reviewed-by: Anthony Liguori <aliguori@us.ibm.com>
2011-10-20migration: don't "write" when migration is not activeJuan Quintela1-0/+4
If migration is not active, just ignore writes. Signed-off-by: Juan Quintela <quintela@redhat.com>
2011-10-20buffered_file: reuse QEMUFile has_error fieldJuan Quintela1-9/+8
Instead of having two has_error fields in QEMUFile & QEMUBufferedFile, reuse the 1st one. Notice that the one in buffered_file is only set after a file operation. Signed-off-by: Juan Quintela <quintela@redhat.com> Reviewed-by: Anthony Liguori <aliguori@us.ibm.com>
2011-10-20buffered_file: Use right "opaque"Juan Quintela1-1/+1
buffered_close 's' variable is of type QEMUFileBuffered, and wait_for_unfreeze() expect to receive a MigrationState, that 'coincidentaly' is s->opaque. Signed-off-by: Juan Quintela <quintela@redhat.com> Reviewed-by: Anthony Liguori <aliguori@us.ibm.com>
2011-10-20migration: If there is one error, it makes no sense to continueJuan Quintela1-3/+9
Once there, add a comment about what each error mean. Signed-off-by: Juan Quintela <quintela@redhat.com>
2011-10-20migration: add error handling to migrate_fd_put_notify().Yoshiaki Tamura1-3/+3
Although migrate_fd_put_buffer() sets MIG_STATE_ERROR if it failed, since migrate_fd_put_notify() isn't checking error of underlying QEMUFile, those resources are kept open. This patch checks it and calls migrate_fd_error() in case of error. Signed-off-by: Yoshiaki Tamura <tamura.yoshiaki@lab.ntt.co.jp> Signed-off-by: Juan Quintela <quintela@redhat.com> Reviewed-by: Anthony Liguori <aliguori@us.ibm.com>
2011-10-20migration: Check that migration is active before cancel itJuan Quintela1-2/+2
Signed-off-by: Juan Quintela <quintela@redhat.com> Reviewed-by: Anthony Liguori <aliguori@us.ibm.com>
2011-10-20migration: simplify state assignmenteJuan Quintela1-7/+4
Once there, make sure that if we already know that there is one error, just call migration_fd_cleanup() with the ERROR state. Signed-off-by: Juan Quintela <quintela@redhat.com> Reviewed-by: Anthony Liguori <aliguori@us.ibm.com>
2011-10-20ds1225y: Use stdio instead of QEMUFileJuan Quintela1-12/+16
QEMUFile * is only intended for migration nowadays. Using it for anything else just adds pain and a layer of buffers for no good reason. Signed-off-by: Juan Quintela <quintela@redhat.com> Reviewed-by: Anthony Liguori <aliguori@us.ibm.com>
2011-10-20Revert "savevm: fix corruption in vmstate_subsection_load()."Juan Quintela1-9/+1
This reverts commit eb60260de0b050a5e8ab725e84d377d0b44c43ae. Conflicts: savevm.c We changed qemu_peek_byte() prototype, just fixed the rejects. Signed-off-by: Juan Quintela<quintela@redhat.com> Reviewed-by: Anthony Liguori <aliguori@us.ibm.com>
2011-10-20savevm: improve subsections detection on loadJuan Quintela1-35/+75
We add qemu_peek_buffer, that is identical to qemu_get_buffer, just that it don't update f->buf_index. We add a paramenter to qemu_peek_byte() to be able to peek more than one byte. Once this is done, to see if we have a subsection we look: - 1st byte is QEMU_VM_SUBSECTION - 2nd byte is a length, and is bigger than section name - 3rd element is a string that starts with section_name So, we shouldn't have false positives (yes, content could still get us wrong but probabilities are really low). v2: - Alex Williamsom found that we could get negative values on index. - Rework code to fix that part. - Rewrite qemu_get_buffer() using qemu_peek_buffer() v3: - return "done" on error case v4: - fix qemu_file_skip() off by one. Signed-off-by: Juan Quintela <quintela@redhat.com>
2011-10-20savevm: define qemu_get_byte() using qemu_peek_byte()Juan Quintela1-9/+6
Signed-off-by: Juan Quintela<quintela@redhat.com>
2011-10-20savevm: some coding style cleanupsJuan Quintela1-7/+14
This patch will make moving code on next patches and having checkpatch happy easier. Signed-off-by: Juan Quintela<quintela@redhat.com> Reviewed-by: Anthony Liguori <aliguori@us.ibm.com>
2011-10-20savevm: teach qemu_fill_buffer to do partial refillsJuan Quintela1-3/+11
We will need on next patch to be able to lookahead on next patch v2: rename "used" to "pending" (Alex Williams) Signed-off-by: Juan Quintela<quintela@redhat.com> Reviewed-by: Anthony Liguori <aliguori@us.ibm.com>
2011-10-16i8259: Move to hw libraryJan Kiszka12-4/+15
No target-specific bits remaining, let's move it over. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-10-16monitor: Restrict pic/irq_info to supporting targetsJan Kiszka14-77/+33
This allows to drop various stubs and move the i8359 into hwlib. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-10-16i8259: Fix coding styleJan Kiszka1-20/+34
No functional changes. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-10-16i8259: Convert to qdevJan Kiszka1-57/+100
This key cleanup step requires to move the IRQ debugging bit from i8259_set_irq directly to the per-PIC pic_set_irq, to pass the PIC parameters (I/O base, ELCR address and mask, master/slave mode) as qdev properties, and to interconnect the PICs with their environment via GPIO pins. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-10-16qdev: Add HEX8 propertyJan Kiszka2-0/+32
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Reviewed-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-10-16i8259: Eliminate PicState2Jan Kiszka2-35/+34
Introduce a reference to the slave PIC for the few cases we need to access it without a proper pointer at hand and drop PicState2. We could even live without slave_pic if we had a better way of modeling the cascade bus the PICs are attached to (in addition to the ISA bus). Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-10-16i8259: Replace PicState::pics_state with master flagJan Kiszka1-9/+9
This reflects how real PICs indentify their role (in non-buffered mode): Pass the state of the /SP input on pic_init and use it instead of pics_state to differentiate between master and slave mode. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-10-16i8259: PREP: Replace pic_intack_read with pic_read_irqJan Kiszka3-41/+1
There is nothing in the i8259 spec that justifies the special pic_intack_read. At least the Linux PREP kernels configure the PICs properly so that pic_read_irq returns identical values, and setting read_reg_select in PIC0 cannot be derived from any special i8259 mode. So switch ppc_prep to pic_read_irq and drop the now unused PIC code. CC: Andreas Färber <andreas.faerber@web.de> Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-10-16i8259: Clean up pic_ioport_readJan Kiszka1-2/+1
Drop redundant local address variable. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-10-16i8259: Fix poll commandJan Kiszka1-1/+7
This was probably never used so far: According to the spec, polling means ack'ing the pending IRQ and setting its corresponding bit in isr. Moreover, we have to signal a pending IRQ via bit 7 of the returned value, and we must not return a spurious IRQ if none is pending. This implements the poll command without the help of pic_poll_read which is left untouched as pic_intack_read is still using it. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-10-16i8259: Switch to per-PIC IRQ updateJan Kiszka1-40/+21
This converts pic_update_irq to work against a single PIC instead of the complete cascade. Along this change, the required update after pic_set_irq1 is now moved into that function. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-10-16i8259: Clear ELCR on resetJan Kiszka1-5/+10
The ELCR is actually part of the chipset but we model it here for simplicity reasons. The PIIX3 clears the ELCR on reset, which was once broken by 4dbe19e181. Fix this by splitting up pic_init_reset from pic_reset and clearing the register in the latter. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-10-16i8259: Update IRQ state after resetJan Kiszka1-2/+1
MIPS and PPC users of the i8259 output signal expect us to report state updates also after reset. As no consumer (including the master PIC) can misinterpret the deassert as an activation event, it is safe to simply update the IRQ state after reset. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-10-16i8259: Reorder intack in pic_read_irqJan Kiszka1-4/+6
As we want to move the IRQ update to pic_intack, ordering matters: the slave ack must be executed before the master ack to avoid missing further pending slave IRQs. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-10-16i8259: Do not update IRQ output after spurious pic_poll_readJan Kiszka1-1/+0
If pic_poll_read finds no pending IRQ and return a spurious one instead, no PIC state is changed, thus we do not need to call pic_update_irq. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-10-16i8239: Introduce per-PIC output interruptJan Kiszka1-9/+12
As a first step towards more generic master-slave support, remove parent_irq in favor of a per-PIC output interrupt line. The slave's line is attached to IRQ2 of the master, but it remains unused for now. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-10-16i8259: Move pic_set_irq1 after pic_update_irqJan Kiszka1-26/+29
We are about to call the latter from the former. No functional changes. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-10-16i8259: Drop obsolete prototypesJan Kiszka1-2/+0
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-10-16i8259: Remove premature inline function attributesJan Kiszka1-3/+3
The compiler is smarter in choosing the right optimization. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-10-16pc: Fix and clean up PIC-to-APIC IRQ pathJan Kiszka4-12/+12
The master PIC is connected to the LINTIN0 of the APICs. As the APIC currently does not track the state of that line, we have to ask the PIC to reinject its IRQ after the CPU picked up an event from the APIC. This introduces pic_get_output to read the master PIC IRQ line state without changing it. The APIC uses this function to decide if a PIC IRQ should be reinjected on apic_update_irq. This reflects better how the real hardware works. The patch fixes some failures of the kvm unit tests apic and eventinj by allowing to enable the proper CPU IRQ deassertion when the guest masks some pending IRQs at PIC level. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-10-16pc: Convert GSIState::i8259_irq into arrayJan Kiszka2-2/+4
Will be required when we no longer let i8259_init allocate the PIC IRQs but convert that chips to qdev. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-10-16pc: Generalize ISA IRQs to GSIsJan Kiszka5-31/+42
The ISA bus IRQ range is 0..15. What isa_irq_handler and IsaIrqState are actually dealing with are the Global System Interrupts. Refactor the code to clarify this. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-10-16pc: Drop useless test from isa_irq_handlerJan Kiszka1-3/+2
IsaIrqState::ioapic is always non-NULL. Probably, the concrete qemu_irq was supposed to be tested, but that's already done by qemu_set_irq. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-10-16target-xtensa: add Avnet LX60/LX110/LX200 boardsMax Filippov4-0/+240
These boards carry similar hardware: SDRAM (48M for LX110, 64M for LX60, 96M for LX200), 16 Mbyte FLASH, FPGA, 10/100 Mbps Ethernet PHY and 16550 UART. FPGA may be loaded with almost any Tensilica processor. It is also used to implement Ethernet MAC, e.g. OpenCores 10/100 Mbps Ethernet MAC and LED/DIP switches access. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-10-16hw: add OpenCores 10/100 Mbps Ethernet controllerMax Filippov3-0/+743
This is OpenCores Ethernet MAC + subset of National Semiconductors DP83838C PHY. OpenCores Ethernet MAC project: http://opencores.org/project,ethmac Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-10-16target-xtensa: rename dc232b board to simMax Filippov3-15/+15
This is to get aligned with the linux name for this machine. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-10-16target-xtensa: add fsf coreMax Filippov3-0/+384
This is FSF big endian core implemented through linux overlay. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-10-16target-xtensa: add dc232b coreMax Filippov4-0/+713
This is Diamond 232L Standard Core Rev.B (LE), implemented through linux/gdb overlay. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-10-16target-xtensa: extract core configuration from overlayMax Filippov3-13/+554
Introduce overlay_tool.h that defines core configuration blocks from data available in the linux architecture variant overlay. Overlay data is automatically generated in the core configuration process by Tensilica tools and can be directly converted to qemu xtensa core description by overlay_tool.h Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-10-16target-xtensa: implement external interrupt mappingMax Filippov2-0/+15
Xtensa cores may have different mapping of external interrupt pins to internal IRQ numers. Implement API to acquire core IRQ by its external interrupt number. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-10-16target-xtensa: remove hand-written xtensa cores implementationsMax Filippov5-968/+2
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-10-16target-xtensa: increase xtensa options accuracyMax Filippov2-8/+12
- add separate options for each operation in the MISC_OP; - add an option for MULSH/MULUH; - put S32C1I under conditional store option. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-10-15target-xtensa: update qemu-doc.texiMax Filippov2-7/+88
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-10-15target-xtensa: add MAC16 unit testsMax Filippov2-0/+244
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-10-15target-xtensa: implement MAC16 optionMax Filippov2-1/+137
See ISA, 4.3.7 for the details. - add ACC and MR special registers; - implement MAC16 and all inner MAC* opcode groups. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
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