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2014-04-22block: Add errp to bdrv_new()Kevin Wolf9-15/+24
2014-04-22convert fprintf() calls to error_setg() in block/qed.c:bdrv_qed_create()Aakriti Gupta1-7/+9
2014-04-22block: Remove -errno return value from bdrv_assign_node_nameKevin Wolf1-12/+11
2014-04-22curl: Replaced old error handling with error reporting API.Maria Kustova1-1/+1
2014-04-22block: Handle error of bdrv_getlength in bdrv_create_dirty_bitmapFam Zheng4-8/+41
2014-04-22vmdk: Fix %d and %lld to PRI* in format stringsFam Zheng1-6/+7
2014-04-22block: Check bdrv_getlength() return value in bdrv_make_zero()Kevin Wolf1-1/+7
2014-04-22block: Catch integer overflow in bdrv_rw_co()Kevin Wolf2-4/+5
2014-04-22block: Limit size to INT_MAX in bdrv_check_byte_request()Kevin Wolf1-0/+4
2014-04-22block: Fix nb_sectors check in bdrv_check_byte_request()Kevin Wolf1-1/+1
2014-04-17Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20140417-...Peter Maydell27-805/+2415
2014-04-17target-arm: A64: fix unallocated test of scalar SQXTUNAlex Bennée1-1/+1
2014-04-17arm: translate.c: Fix smlald InstructionPeter Crosthwaite1-11/+23
2014-04-17net: cadence_gem: Make phy respond to broadcastPeter Crosthwaite1-2/+2
2014-04-17misc: zynq_slcr: Make DB_PRINTs always compilePeter Crosthwaite1-6/+8
2014-04-17misc: zynq_slcr: Convert SBD::init to object initPeter Crosthwaite1-8/+5
2014-04-17misc: zynq-slcr: RewritePeter Crosthwaite1-378/+294
2014-04-17allwinner-emac: update irq status after writes to interrupt registersBeniamino Galvani1-0/+2
2014-04-17allwinner-emac: set autonegotiation complete bit on link upBeniamino Galvani2-2/+3
2014-04-17allwinner-a10-pit: implement prescaler and source selectionBeniamino Galvani3-1/+41
2014-04-17allwinner-a10-pit: use level triggered interruptsBeniamino Galvani1-1/+14
2014-04-17allwinner-a10-pit: avoid generation of spurious interruptsBeniamino Galvani2-13/+24
2014-04-17allwinner-a10-pic: fix behaviour of pending registerBeniamino Galvani1-1/+7
2014-04-17allwinner-a10-pic: set vector address when an interrupt is pendingBeniamino Galvani1-4/+10
2014-04-17timer: cadence_ttc: Fix match register write logicPeter Crosthwaite1-0/+2
2014-04-17target-arm/gdbstub64.c: remove useless 'break' statement.Chen Gang1-2/+0
2014-04-17target-arm: Dump 32-bit CPU state if 64 bit CPU is in AArch32Peter Maydell4-3/+13
2014-04-17target-arm: Handle the CPU being in AArch32 mode in the AArch64 set_pcPeter Maydell1-4/+8
2014-04-17target-arm: Make Cortex-A15 CBAR read-onlyPeter Maydell1-1/+1
2014-04-17target-arm: Implement CBAR for Cortex-A57Peter Maydell5-9/+42
2014-04-17target-arm: Implement Cortex-A57 implementation-defined system registersPeter Maydell1-0/+55
2014-04-17target-arm: Implement RVBAR registerPeter Maydell3-0/+16
2014-04-17target-arm: Implement AArch64 address translation operationsPeter Maydell2-31/+25
2014-04-17target-arm: Implement auxiliary fault status registersPeter Maydell1-0/+9
2014-04-17target-arm: Replace wildcarded cpreg definitions with precise ones for ARMv8Peter Maydell1-5/+91
2014-04-17target-arm: Don't expose wildcard ID register definitions for ARMv8Peter Maydell1-18/+43
2014-04-17target-arm: Remove THUMB2EE feature from AArch64 'any' CPUPeter Maydell1-1/+0
2014-04-17target-arm: Implement ISR_EL1 registerPeter Maydell1-0/+18
2014-04-17target-arm: Implement AArch64 view of ACTLRPeter Maydell1-1/+2
2014-04-17target-arm: Implement AArch64 view of CONTEXTIDRPeter Maydell2-16/+19
2014-04-17target-arm: Implement AArch64 views of AArch32 ID registersPeter Maydell1-29/+44
2014-04-17target-arm: Add Cortex-A57 processorPeter Maydell1-0/+43
2014-04-17target-arm: Implement ARMv8 MVFR registersPeter Maydell5-2/+23
2014-04-17target-arm: Implement AArch64 EL1 exception handlingRob Herring6-0/+143
2014-04-17target-arm: Move arm_log_exception() into internals.hPeter Maydell2-31/+31
2014-04-17target-arm: Implement AArch64 SPSR_EL1Peter Maydell5-11/+40
2014-04-17target-arm: Implement SP_EL0, SP_EL1Peter Maydell6-7/+100
2014-04-17target-arm: Add AArch64 ELR_EL1 register.Peter Maydell4-4/+24
2014-04-17target-arm: Implement AArch64 views of fault status and data registersRob Herring3-18/+29
2014-04-17target-arm: Use dedicated CPU state fields for ARM946 access bit registersPeter Maydell2-10/+16
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