summaryrefslogtreecommitdiff
AgeCommit message (Collapse)AuthorFilesLines
2016-02-18hw/timer: QOM'ify exynos4210_mctxiaoqiang.zhao1-7/+5
assign exynos4210_mct_init to exynos4210_mct_info.instance_init and drop the SysBusDeviceClass::init Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: xiaoqiang zhao <zxq_yx_007@163.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-02-18hw/timer: QOM'ify arm_timer (pass 2)xiaoqiang.zhao1-1/+1
assign DeviceClass::vmsd instead of using vmstate_register function Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: xiaoqiang zhao <zxq_yx_007@163.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-02-18hw/timer: QOM'ify arm_timer (pass 1)xiaoqiang.zhao1-21/+19
* assign icp_pit_init to icp_pit_info.instance_init * split the old SysBus init function into an instance_init and a Device realize function * use DeviceClass::realize instead of SysBusDeviceClass::init Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: xiaoqiang zhao <zxq_yx_007@163.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-02-18hw/sd: use guest error logging rather than fprintf to stderrAndrew Baumann1-9/+12
Some of these errors may be harmless (e.g. probing unimplemented commands, or issuing CMD12 in the wrong state), and may also be quite frequent. Spamming the standard error output isn't desirable in such cases. Reviewed-by: Peter Crosthwaite <crosthwaite.peter@gmail.com> Signed-off-by: Andrew Baumann <Andrew.Baumann@microsoft.com> Message-id: 1454902521-21164-4-git-send-email-Andrew.Baumann@microsoft.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-02-18hw/sd: model a power-up delay, as a workaround for an EDK2 bugAndrew Baumann1-5/+76
The SD spec for ACMD41 says that a zero argument is an "inquiry" ACMD41, which does not start initialisation and is used only for retrieving the OCR. However, Tianocore EDK2 (UEFI) has a bug [1]: it first sends an inquiry (zero) ACMD41. If that first request returns an OCR value with the power up bit (0x80000000) set, it assumes the card is ready and continues, leaving the card in the wrong state. (My assumption is that this works on hardware, because no real card is immediately powered up upon reset.) This change models a delay of 0.5ms from the first ACMD41 to the power being up. However, it also immediately sets the power on upon seeing a non-zero (non-enquiry) ACMD41. This speeds up UEFI boot, it should also account for guests that simply delay after card reset and then issue an ACMD41 that they expect will succeed. [1] https://github.com/tianocore/edk2/blob/master/EmbeddedPkg/Universal/MmcDxe/MmcIdentification.c#L279 (This is the loop starting with "We need to wait for the MMC or SD card is ready") Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Andrew Baumann <Andrew.Baumann@microsoft.com> Message-id: 1454902521-21164-3-git-send-email-Andrew.Baumann@microsoft.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-02-18hw/sd: implement CMD23 (SET_BLOCK_COUNT) for MMC compatibilityAndrew Baumann1-0/+37
CMD23 is optional for SD but required for MMC, and the UEFI bootloader used for Windows on Raspberry Pi 2 issues it. Reviewed-by: Peter Crosthwaite <crosthwaite.peter@gmail.com> Signed-off-by: Andrew Baumann <Andrew.Baumann@microsoft.com> Message-id: 1454902521-21164-2-git-send-email-Andrew.Baumann@microsoft.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-02-18hw/sd/pxa2xx_mmci: Add reset functionPeter Maydell1-0/+30
Add a reset function to the pxa2xx_mmci device; previously it had no handling for system reset at all. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Peter Crosthwaite <crosthwaite.peter@gmail.com> Message-id: 1455646193-13238-11-git-send-email-peter.maydell@linaro.org
2016-02-18hw/sd/pxa2xx_mmci: Convert to VMStateDescriptionPeter Maydell1-92/+64
Convert the pxa2xx_mmci device from manual save/load functions to a VMStateDescription structure. This is a migration compatibility break. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Peter Crosthwaite <crosthwaite.peter@gmail.com> Message-id: 1455646193-13238-10-git-send-email-peter.maydell@linaro.org
2016-02-18hw/sd/pxa2xx_mmci: Update to use new SDBus APIsPeter Maydell1-14/+66
Now the PXA2xx MMCI device is QOMified itself, we can update it to use the SDBus APIs to talk to the SD card. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 1455646193-13238-9-git-send-email-peter.maydell@linaro.org
2016-02-18hw/sd/pxa2xx_mmci: convert to SysBusDevice objectPeter Maydell1-16/+54
Convert the pxa2xx_mmci device to be a sysbus device. In this commit we only change the device itself, and leave the interface to the SD card using the old non-SDBus APIs. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Peter Crosthwaite <crosthwaite.peter@gmail.com> Message-id: 1455646193-13238-8-git-send-email-peter.maydell@linaro.org
2016-02-18sdhci_sysbus: Create SD card device in users, not the device itselfPeter Maydell4-26/+45
Move the creation of the SD card device from the sdhci_sysbus device itself into the boards that create these devices. This allows us to remove the cannot_instantiate_with_device_add notation because we no longer call drive_get_next in the device model. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Alistair Francis <alistair.francis@xilinx.com> Message-id: 1455646193-13238-7-git-send-email-peter.maydell@linaro.org
2016-02-18hw/sd/sdhci.c: Update to use SDBus APIsPeter Maydell2-31/+69
Update the SDHCI code to use the new SDBus APIs. This commit introduces the new command line options required to connect a disk to sdhci-pci: -device sdhci-pci -drive id=mydrive,[...] -device sd,drive=mydrive Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Alistair Francis <alistair.francis@xilinx.com> Message-id: 1455646193-13238-6-git-send-email-peter.maydell@linaro.org
2016-02-18hw/sd: Add QOM bus which SD cards plug in toPeter Maydell4-5/+252
Add a QOM bus for SD cards to plug in to. Note that since sd_enable() is used only by one board and there only as part of a broken implementation, we do not provide it in the SDBus API (but instead add a warning comment about the old function). Whoever converts OMAP and the nseries boards to QOM will need to either implement the card switch properly or move the enable hack into the OMAP MMC controller model. In the SDBus API, the old-style use of sd_set_cb to register some qemu_irqs for notification of card insertion and write-protect toggling is replaced with methods in the SDBusClass which the card calls on status changes and methods in the SDClass which the controller can call to find out the current status. The query methods will allow us to remove the abuse of the 'register irqs' API by controllers in their reset methods to trigger the card to tell them about the current status again. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Alistair Francis <alistair.francis@xilinx.com> Message-id: 1455646193-13238-5-git-send-email-peter.maydell@linaro.org
2016-02-18hw/sd/sd.c: Convert sd_reset() function into Device reset methodPeter Maydell1-5/+5
Convert the sd_reset() function into a proper Device reset method. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Alistair Francis <alistair.francis@xilinx.com> Reviewed-by: Peter Crosthwaite <crosthwaite.peter@gmail.com> Message-id: 1455646193-13238-4-git-send-email-peter.maydell@linaro.org
2016-02-18hw/sd/sd.c: QOMifyPeter Maydell2-22/+80
Turn the SD card into a QOM device. This conversion only changes the device itself; the various functions which are effectively methods on the device are not touched at this point. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Peter Crosthwaite <crosthwaite.peter@gmail.com> Reviewed-by: Alistair Francis <alistair.francis@xilinx.com> Message-id: 1455646193-13238-3-git-send-email-peter.maydell@linaro.org
2016-02-18hw/sd/sdhci.c: Remove x-drive propertyPeter Maydell1-6/+0
The following commits will remove support for the old sdhci-pci command line syntax using the x-drive property: -device sdhci-pci,x-drive=mydrive -drive id=mydrive,[...] and replace it with an explicit sd device: -device sdhci-pci -drive id=mydrive,[...] -device sd,drive=mydrive (This is OK because x-drive is experimental.) This commit removes the x-drive property so that old style command lines will fail with a reasonable error message: -device sdhci-pci,x-drive=mydrive: Property '.x-drive' not found Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Alistair Francis <alistair.francis@xilinx.com> Reviewed-by: Peter Crosthwaite <crosthwaite.peter@gmail.com> Message-id: 1455646193-13238-2-git-send-email-peter.maydell@linaro.org
2016-02-18ARM: PL061: Cleaning field of PL061 device stateWei Huang1-4/+2
This patch removes the float_high field of PL061State, which doesn't seem to be used anywhere. Because this changes the device state, the version ID is also bumped up for the reason of compatiblity. Signed-off-by: Wei Huang <wei@redhat.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 1455729552-28026-3-git-send-email-wei@redhat.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-02-18ARM: PL061: Clear PL061 device state after resetWei Huang1-4/+27
Current QEMU doesn't clear PL061 state after reset. This causes a weird issue with guest reboot via GPIO. Here is the device state with two reboot requests: (PL061State fields) data old_in_data istate VM boot 0 0 0 After 1st ACPI reboot request 8 8 8 After VM PL061 driver ACK 8 8 0 After VM reboot 8 8 0 ------------------------------------------------------------ 2nd ACPI reboot request 8 In the second reboot request above, because the old_in_data field is 8, QEMU decides that there is a pending edge IRQ already (see pl061_update()) in input; so it doesn't raise up IRQ again. As a result the second reboot request is lost. The correct way is to clear PL061 device state after reset. The default reset state is found from the documents listed below. Per Peter's suggestion that QEMU automatically calls reset function after device initialization, this patch removes calling pl061_reset() from pl061_initfn(). Reference: [1] PL061 Technical Reference Manual [2] Stellaris LM3S8962 Microcontroller Data Sheet [3] Stellaris LM3S5P31 Microcontroller Data Sheet Signed-off-by: Wei Huang <wei@redhat.com> Message-id: 1455729552-28026-2-git-send-email-wei@redhat.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-02-18target-arm: Add PMUSERENR_EL0 registerAlistair Francis1-0/+6
The Linux kernel accesses this register early in its setup. Signed-off-by: Christopher Covington <christopher.covington@linaro.org> Signed-off-by: Alistair Francis <alistair.francis@xilinx.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: b30d536cb16ec57b4412172bb6dbc3f00d293e7d.1455060548.git.alistair.francis@xilinx.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-02-18target-arm: Add the pmovsclr_el0 and pmintenclr_el1 registersAlistair Francis1-0/+12
Signed-off-by: Aaron Lindsay <alindsay@codeaurora.org> Signed-off-by: Alistair Francis <alistair.francis@xilinx.com> Tested-by: Nathan Rossi <nathan@nathanrossi.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 50deeafb24958a5b6d7f594b5dda399a022c0e5b.1455060548.git.alistair.francis@xilinx.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-02-18target-arm: Add the pmceid0 and pmceid1 registersAlistair Francis4-0/+22
Signed-off-by: Aaron Lindsay <alindsay@codeaurora.org> Signed-off-by: Alistair Francis <alistair.francis@xilinx.com> Tested-by: Nathan Rossi <nathan@nathanrossi.com> Message-id: da0563119a9f56fd5fbdc26e7ed19a8a8457c5b9.1455060548.git.alistair.francis@xilinx.com [PMM: Use 0 for PMCEID0 values for A15 and A57 since our PMU does not currently implement any events.] Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-02-18target-arm: UNDEF in the UNPREDICTABLE SRS-from-System casePeter Maydell2-4/+13
Make get_r13_banked() raise an exception at runtime for the corner case of SRS from System mode, so that we can UNDEF it; this brings us in to line with the ARM ARM's set of permitted CONSTRAINED UNPREDICTABLE choices. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Sergey Fedorov <serge.fdrv@gmail.com> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
2016-02-18target-arm: Combine user-only and softmmu get/set_r13_banked()Peter Maydell1-19/+0
The user-mode versions of get/set_r13_banked() exist just to assert if they're ever called -- the translate time code should never emit calls to them because SRS from user mode always UNDEF. There's no code in the softmmu versions that can't compile in CONFIG_USER_ONLY, and the assertion is not particularly useful, so combine the two functions rather than having completely split versions under ifdefs. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Reviewed-by: Sergey Fedorov <serge.fdrv@gmail.com>
2016-02-18target-arm: Move bank_number() into internals.hPeter Maydell2-26/+25
Move bank_number()'s implementation into internals.h, so it's available in the user-mode-only compile as well. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Sergey Fedorov <serge.fdrv@gmail.com>
2016-02-18target-arm: Move get/set_r13_banked() to op_helper.cPeter Maydell2-33/+37
Move get/set_r13_banked() from helper.c to op_helper.c. This will let us add exception-raising code to them, and also puts them in the same file as get/set_user_reg(), which makes some conceptual sense. (The original reason for the helper.c/op_helper.c split was that only op_helper.c had access to the CPU env pointer; this distinction has not been true for a long time, though, and so the split is now rather arbitrary.) Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Sergey Fedorov <serge.fdrv@gmail.com> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
2016-02-18target-arm: Clean up trap/undef handling of SRSPeter Maydell1-5/+61
The SRS instruction is: * UNDEFINED in Hyp mode * UNPREDICTABLE in User or System mode * UNPREDICTABLE if the specified mode isn't accessible * trapped to EL3 if EL3 is AArch64 and we are at Secure EL1 Clean up the code to handle all these cases cleanly, including picking UNDEF as our choice of UNPREDICTABLE behaviour rather blindly trusting the mode field passed in the instruction. As part of this, move the check for IS_USER into gen_srs() itself rather than having it done by the caller. The exception is that we don't UNDEF for calls from System mode, which need a runtime check. This will be dealt with in the following commits. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Sergey Fedorov <serge.fdrv@gmail.com> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
2016-02-18target-arm: Report correct syndrome for FPEXC32_EL2 trapsPeter Maydell3-2/+20
If access to FPEXC32_EL2 is trapped by CPTR_EL2.TFP or CPTR_EL3.TFP, this should be reported with a syndrome register indicating an FP access trap, not one indicating a system register access trap. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Sergey Fedorov <serge.fdrv@gmail.com>
2016-02-18target-arm: Implement MDCR_EL3.TDA and MDCR_EL2.TDA trapsPeter Maydell1-9/+30
Implement the debug register traps controlled by MDCR_EL2.TDA and MDCR_EL3.TDA. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Sergey Fedorov <serge.fdrv@gmail.com>
2016-02-18target-arm: Implement MDCR_EL2.TDRA trapsPeter Maydell1-3/+24
Implement trapping of the "debug ROM" registers, which are controlled by MDCR_EL2.TDRA for EL2 but by the more general MDCR_EL3.TDA for EL3. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Sergey Fedorov <serge.fdrv@gmail.com>
2016-02-18target-arm: Implement MDCR_EL3.TDOSA and MDCR_EL2.TDOSA trapsPeter Maydell2-1/+34
Implement the traps to EL2 and EL3 controlled by the bits MDCR_EL2.TDOSA MDCR_EL3.TDOSA. These can configurably trap accesses to the "powerdown debug" registers. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Sergey Fedorov <serge.fdrv@gmail.com>
2016-02-18target-arm: Fix handling of SCR.SMDPeter Maydell1-5/+7
We weren't quite implementing the handling of SCR.SMD correctly. The condition governing whether the SMD bit should apply only for NS state is "is EL3 is AArch32", not "is the current EL AArch32". Fix the condition, and clarify the comment both to reflect this and to expand slightly on what's going on for the v7-no-Virtualization case. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Sergey Fedorov <serge.fdrv@gmail.com> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
2016-02-18target-arm: correct CNTFRQ access rightsPeter Maydell2-3/+38
Correct some corner cases we were getting wrong for CNTFRQ access rights: * should UNDEF from 32-bit Secure EL1 * only writable from the highest implemented exception level, which might not be EL1 now To clarify the code, provide a new utility function arm_highest_el() which returns the highest implemented exception level. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Sergey Fedorov <serge.fdrv@gmail.com> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
2016-02-18Merge remote-tracking branch 'remotes/dgibson/tags/ppc-for-2.6-20160218' ↵Peter Maydell13-232/+393
into staging ppc patch queue for 2016-02-18 Currently accumulated patches for target-ppc, pseries machine type and related devices. * Some cleanups to management of SDR1 and the hashed page table * Implementations of a number of simple PAPR hypercalls * Significant improvements to the Macintosh CUDA device * Several bugfixes # gpg: Signature made Thu 18 Feb 2016 04:16:51 GMT using RSA key ID 20D9B392 # gpg: Good signature from "David Gibson <david@gibson.dropbear.id.au>" # gpg: aka "David Gibson (Red Hat) <dgibson@redhat.com>" # gpg: aka "David Gibson (ozlabs.org) <dgibson@ozlabs.org>" # gpg: WARNING: This key is not certified with sufficiently trusted signatures! # gpg: It is not certain that the signature belongs to the owner. # Primary key fingerprint: 75F4 6586 AE61 A66C C44E 87DC 6C38 CACA 20D9 B392 * remotes/dgibson/tags/ppc-for-2.6-20160218: (26 commits) hw/ppc/spapr: Halt CPU when powering off via RTAS call pseries: Include missing pseries-2.5 compat properties in pseries-2.4 cuda: remove CUDA_GET_SET_IIC/CUDA_COMBINED_FORMAT_IIC commands cuda: remove GET_6805_ADDR command cuda: port SET_TIME command to new framework cuda: port GET_TIME command to new framework cuda: port SET_POWER_MESSAGES command to new framework cuda: port FILE_SERVER_FLAG command to new framework cuda: port RESET_SYSTEM command to new framework cuda: port POWERDOWN command to new framework cuda: port SET_DEVICE_LIST command to new framework cuda: port SET_AUTO_RATE command to new framework cuda: port AUTOPOLL command to new framework cuda: move unknown commands reject out of switch cuda: add a framework to handle commands hw/ppc/spapr: Implement the h_set_xdabr hypercall hw/ppc/spapr: Implement h_set_dabr hw/ppc/spapr: Add h_set_sprg0 hypercall migration: ensure htab_save_first completes after timeout target-ppc: Remove hack for ppc_hash64_load_hpte*() with HV KVM ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-02-18hw/ppc/spapr: Halt CPU when powering off via RTAS callThomas Huth1-0/+1
The LoPAPR specification defines the following for the RTAS power-off call: "On successful operation, does not return". However, the implementation in QEMU currently returns and runs the guest CPU again for some more cycles. This caused some trouble with the new ppc implementation of the kvm-unit-tests recently. So let's make sure that the QEMU implementation follows the spec, thus stop the CPU to make sure that the RTAS call does not return to the guest anymore. Signed-off-by: Thomas Huth <thuth@redhat.com> Tested-by: Andrew Jones <drjones@redhat.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2016-02-17pseries: Include missing pseries-2.5 compat properties in pseries-2.4David Gibson1-0/+1
Commit 4b23699 "pseries: Add pseries-2.6 machine type" added a new SPAPR_COMPAT_2_5 macro in the usual way. However, it didn't add this macro to the existing SPAPR_COMPAT_2_4 macro so that pseries-2.4 inherits newer compatibility properties which are needed for 2.5 and earlier. This corrects the oversight. Reported-by: Laszlo Ersek <lersek@redhat.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Laurent Vivier <lvivier@redhat.com>
2016-02-17cuda: remove CUDA_GET_SET_IIC/CUDA_COMBINED_FORMAT_IIC commandsHervé Poussineau1-23/+0
We currently don't emulate the I2C bus provided by CUDA. Signed-off-by: Hervé Poussineau <hpoussin@reactos.org> Reviewed-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2016-02-17cuda: remove GET_6805_ADDR commandHervé Poussineau1-3/+0
It doesn't seem to be used, and operating systems should accept a 'unknown command' answer. Signed-off-by: Hervé Poussineau <hpoussin@reactos.org> Reviewed-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2016-02-17cuda: port SET_TIME command to new frameworkHervé Poussineau1-6/+18
Reviewed-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Hervé Poussineau <hpoussin@reactos.org> Reviewed-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2016-02-17cuda: port GET_TIME command to new frameworkHervé Poussineau1-8/+21
Reviewed-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Hervé Poussineau <hpoussin@reactos.org> Reviewed-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2016-02-17cuda: port SET_POWER_MESSAGES command to new frameworkHervé Poussineau1-3/+16
Reviewed-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Hervé Poussineau <hpoussin@reactos.org> Reviewed-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2016-02-17cuda: port FILE_SERVER_FLAG command to new frameworkHervé Poussineau1-1/+16
This command tells if computer should automatically wake-up after a power loss. Reviewed-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Hervé Poussineau <hpoussin@reactos.org> Reviewed-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2016-02-17cuda: port RESET_SYSTEM command to new frameworkHervé Poussineau1-4/+13
Reviewed-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Hervé Poussineau <hpoussin@reactos.org> Reviewed-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2016-02-17cuda: port POWERDOWN command to new frameworkHervé Poussineau1-4/+13
Reviewed-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Hervé Poussineau <hpoussin@reactos.org> Reviewed-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2016-02-17cuda: port SET_DEVICE_LIST command to new frameworkHervé Poussineau4-11/+28
Also implement the command, by taking device list mask into account when polling ADB devices. Signed-off-by: Hervé Poussineau <hpoussin@reactos.org> Reviewed-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2016-02-17cuda: port SET_AUTO_RATE command to new frameworkHervé Poussineau2-6/+31
Also implement the command, by removing the hardcoded period of 20 ms/50 Hz and replacing it by the one requested by user. Update VMState version to store this new parameter. Signed-off-by: Hervé Poussineau <hpoussin@reactos.org> Reviewed-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2016-02-17cuda: port AUTOPOLL command to new frameworkHervé Poussineau1-15/+25
Reviewed-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Hervé Poussineau <hpoussin@reactos.org> Reviewed-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2016-02-17cuda: move unknown commands reject out of switchHervé Poussineau1-14/+16
Signed-off-by: Hervé Poussineau <hpoussin@reactos.org> Reviewed-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2016-02-17cuda: add a framework to handle commandsHervé Poussineau1-0/+34
Next commits will port existing CUDA commands to this framework. Signed-off-by: Hervé Poussineau <hpoussin@reactos.org> Reviewed-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2016-02-17hw/ppc/spapr: Implement the h_set_xdabr hypercallThomas Huth1-0/+22
The H_SET_XDABR hypercall is similar to H_SET_DABR, but also sets the extended DABR (DABRX) register. Signed-off-by: Thomas Huth <thuth@redhat.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2016-02-17hw/ppc/spapr: Implement h_set_dabrThomas Huth1-5/+20
According to LoPAPR, h_set_dabr should simply set DABRX to 3 (if the register is available), and load the parameter into DABR. If DABRX is not available, the hypervisor has to check the "Breakpoint Translation" bit of the DABR register first. Signed-off-by: Thomas Huth <thuth@redhat.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-23 22:43:32 +0000