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2016-03-16Merge remote-tracking branch ↵Peter Maydell46-140/+4114
'remotes/pmaydell/tags/pull-target-arm-20160316-1' into staging target-arm queue: * loader: Fix incorrect parameter name in load_image_mr() * Implement MRS (banked) and MSR (banked) instructions * virt: Implement versioning for machine model * i.MX: some initial patches preparing for i.MX6 support * new ASPEED AST2400 SoC and palmetto-bmc machine * bcm2835: add some more raspi2 devices * sd: fix segfault running "info qtree" # gpg: Signature made Wed 16 Mar 2016 17:42:43 GMT using RSA key ID 14360CDE # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" # gpg: aka "Peter Maydell <pmaydell@gmail.com>" # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" * remotes/pmaydell/tags/pull-target-arm-20160316-1: (21 commits) sd: Fix "info qtree" on boards with SD cards bcm2835_dma: add emulation of Raspberry Pi DMA controller bcm2835_property: implement framebuffer control/configuration properties bcm2835_fb: add framebuffer device for Raspberry Pi bcm2835_aux: add emulation of BCM2835 AUX (aka UART1) block bcm2835_peripherals: enable sdhci pending-insert quirk for raspberry pi hw/arm: Add palmetto-bmc machine hw/arm: Add ASPEED AST2400 SoC model hw/intc: Add (new) ASPEED VIC device model hw/timer: Add ASPEED timer device model i.MX: Add missing descriptions in devices. i.MX: Add i.MX6 CCM and ANALOG device. i.MX: Add the CLK_IPG_HIGH clock i.MX: Remove CCM useless clock computation handling. i.MX: Rename CCM NOCLK to CLK_NONE for naming consistency. i.MX: Allow GPT timer to rollover. arm: virt: Move machine class init code to the abstract machine type arm: virt: Add an abstract ARM virt machine type target-arm: Fix translation level on early translation faults target-arm: Implement MRS (banked) and MSR (banked) instructions ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-03-16sd: Fix "info qtree" on boards with SD cardsPeter Maydell1-2/+4
The SD card object is not a SysBusDevice, so don't create it with qdev_create() if we're not assigning it to a specific bus; use object_new() instead. This was causing 'info qtree' to segfault on boards with SD cards, because qdev_create(NULL, TYPE_FOO) puts the created object on the system bus, and then we may try to run functions like sysbus_dev_print() on it, which fail when casting the object to SysBusDevice. (This is the same mistake that we made with the NAND device and fixed in commit 6749695eaaf346c1.) Reported-by: xiaoqiang.zhao <zxq_yx_007@163.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: xiaoqiang.zhao <zxq_yx_007@163.com> Message-id: 1458061009-7733-1-git-send-email-peter.maydell@linaro.org
2016-03-16bcm2835_dma: add emulation of Raspberry Pi DMA controllerGrégory ESTRADE5-0/+484
At present, all DMA transfers complete inline (so a looping descriptor queue will lock up the device). We also do not model pause/abort, arbitrarion/priority, or debug features. Signed-off-by: Grégory ESTRADE <gregory.estrade@gmail.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Andrew Baumann <Andrew.Baumann@microsoft.com> Message-id: 1457467526-8840-6-git-send-email-Andrew.Baumann@microsoft.com [AB: implement 2D mode, cleanup/refactoring for upstream submission] Signed-off-by: Andrew Baumann <Andrew.Baumann@microsoft.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-03-16bcm2835_property: implement framebuffer control/configuration propertiesGrégory ESTRADE4-15/+144
The property channel driver now interfaces with the framebuffer device to query and set framebuffer parameters. As a result of this, the "get ARM RAM size" query now correctly returns the video RAM base address (not total RAM size), and the ram-size property is no longer relevant here. Signed-off-by: Grégory ESTRADE <gregory.estrade@gmail.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Andrew Baumann <Andrew.Baumann@microsoft.com> Message-id: 1457467526-8840-5-git-send-email-Andrew.Baumann@microsoft.com [AB: cleanup/refactoring for upstream submission] Signed-off-by: Andrew Baumann <Andrew.Baumann@microsoft.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-03-16bcm2835_fb: add framebuffer device for Raspberry PiGrégory ESTRADE7-2/+517
The framebuffer occupies the upper portion of memory (64MiB by default), but it can only be controlled/configured via a system mailbox or property channel (to be added by a subsequent patch). Signed-off-by: Grégory ESTRADE <gregory.estrade@gmail.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Andrew Baumann <Andrew.Baumann@microsoft.com> Message-id: 1457467526-8840-4-git-send-email-Andrew.Baumann@microsoft.com [AB: added Windows (BGR) support and cleanup/refactoring for upstream submission] Signed-off-by: Andrew Baumann <Andrew.Baumann@microsoft.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-03-16bcm2835_aux: add emulation of BCM2835 AUX (aka UART1) blockAndrew Baumann5-0/+384
At present only the core UART functions (data path for tx/rx) are implemented, which is enough for UEFI to boot. The following features/registers are unimplemented: * Line/modem control * Scratch register * Extra control * Baudrate * SPI interfaces Signed-off-by: Andrew Baumann <Andrew.Baumann@microsoft.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 1457467526-8840-3-git-send-email-Andrew.Baumann@microsoft.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-03-16bcm2835_peripherals: enable sdhci pending-insert quirk for raspberry piAndrew Baumann1-0/+7
Signed-off-by: Andrew Baumann <Andrew.Baumann@microsoft.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 1457467526-8840-2-git-send-email-Andrew.Baumann@microsoft.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-03-16hw/arm: Add palmetto-bmc machineAndrew Jeffery2-1/+66
The new machine is a thin layer over the AST2400 ARM926-based SoC[1]. Between the minimal machine and the current SoC implementation there is enough functionality to boot an aspeed_defconfig Linux kernel to userspace. Nothing yet is specific to the Palmetto's BMC (other than using an AST2400 SoC), but creating specific machine types is preferable to a generic machine that doesn't match any particular hardware. [1] http://www.aspeedtech.com/products.php?fPath=20&rId=376 Signed-off-by: Andrew Jeffery <andrew@aj.id.au> Message-id: 1458096317-25223-5-git-send-email-andrew@aj.id.au Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-03-16hw/arm: Add ASPEED AST2400 SoC modelAndrew Jeffery3-0/+173
While the ASPEED AST2400 SoC[1] has a broad range of capabilities this implementation is minimal, comprising an ARM926 processor, ASPEED VIC and timer devices, and a 8250 UART. [1] http://www.aspeedtech.com/products.php?fPath=20&rId=376 Signed-off-by: Andrew Jeffery <andrew@aj.id.au> Message-id: 1458096317-25223-4-git-send-email-andrew@aj.id.au Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-03-16hw/intc: Add (new) ASPEED VIC device modelAndrew Jeffery4-0/+395
Implement a basic ASPEED VIC device model for the AST2400 SoC[1], with enough functionality to boot an aspeed_defconfig Linux kernel. The model implements the 'new' (revised) register set: While the hardware exposes both the new and legacy register sets, accesses to the model's legacy register set will not be serviced (however the access will be logged). [1] http://www.aspeedtech.com/products.php?fPath=20&rId=376 Signed-off-by: Andrew Jeffery <andrew@aj.id.au> Message-id: 1458096317-25223-3-git-send-email-andrew@aj.id.au Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-03-16hw/timer: Add ASPEED timer device modelAndrew Jeffery5-0/+519
Implement basic ASPEED timer functionality for the AST2400 SoC[1]: Up to 8 timers can independently be configured, enabled, reset and disabled. Some hardware features are not implemented, namely clock value matching and pulse generation, but the implementation is enough to boot the Linux kernel configured with aspeed_defconfig. [1] http://www.aspeedtech.com/products.php?fPath=20&rId=376 Signed-off-by: Andrew Jeffery <andrew@aj.id.au> Message-id: 1458096317-25223-2-git-send-email-andrew@aj.id.au Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-03-16i.MX: Add missing descriptions in devices.Jean-Christophe Dubois4-0/+4
Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Jean-Christophe Dubois <jcd@tribudubois.net> Message-id: f1f565eb9dffdeb582feb1b15ba9e8b0afcf5468.1456868959.git.jcd@tribudubois.net Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-03-16i.MX: Add i.MX6 CCM and ANALOG device.Jean-Christophe Dubois3-0/+972
Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Jean-Christophe Dubois <jcd@tribudubois.net> Message-id: 9fa80b4d8c5d0f50c94e77d74f952a7a665e168f.1456868959.git.jcd@tribudubois.net Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-03-16i.MX: Add the CLK_IPG_HIGH clockJean-Christophe Dubois5-12/+15
EPIT, GPT and other i.MX timers are using "abstract" clocks among which a CLK_IPG_HIGH clock. On i.MX25 and i.MX31 CLK_IPG and CLK_IPG_HIGH are mapped to the same clock but on other SOC like i.MX6 they are mapped to distinct clocks. This patch add the CLK_IPG_HIGH to prepare for SOC where these 2 clocks are different. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Jean-Christophe Dubois <jcd@tribudubois.net> Message-id: 224bf650194760284cb40630e985867e1373276a.1456868959.git.jcd@tribudubois.net Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-03-16i.MX: Remove CCM useless clock computation handling.Jean-Christophe Dubois3-65/+0
Most clocks supported by the CCM are useless to the qemu framework. Only clocks related to timers (EPIT, GPT, PWM, WATCHDOG, ...) are usefull to QEMU code. Therefore this patch removes clock computation handling for all clocks but: * CLK_NONE, * CLK_IPG, * CLK_32k Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Jean-Christophe Dubois <jcd@tribudubois.net> Message-id: 9e7222efb349801032e60c0f6b0fbad0e5dcf648.1456868959.git.jcd@tribudubois.net Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-03-16i.MX: Rename CCM NOCLK to CLK_NONE for naming consistency.Jean-Christophe Dubois5-9/+9
This way all CCM clock defines/enums are named CLK_XXX Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Jean-Christophe Dubois <jcd@tribudubois.net> Message-id: 8537df765c1713625c7a8b9aca4c7ca60b42e0c0.1456868959.git.jcd@tribudubois.net Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-03-16i.MX: Allow GPT timer to rollover.Jean-Christophe Dubois1-12/+15
GPT timer need to rollover when it reaches 0xffffffff. It also need to reset to 0 when in "restart mode" and crossing the compare 1 register. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Jean-Christophe Dubois <jcd@tribudubois.net> Message-id: 6e2b36117a249a78bf822dd59a390368f407136e.1456868959.git.jcd@tribudubois.net Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-03-16arm: virt: Move machine class init code to the abstract machine typeWei Huang1-14/+20
This patch moves the common class initialization code from "virt-2.6" to the new abstract class. An empty property is added to "virt-2.6" machine. In the meanwhile, related funtions are renamed to "virt_2_6_*" for consistency. Signed-off-by: Wei Huang <wei@redhat.com> Message-id: 1457717778-17727-3-git-send-email-wei@redhat.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-03-16arm: virt: Add an abstract ARM virt machine typeWei Huang1-5/+18
In preparation for future ARM virt machine types, this patch creates an abstract type for all ARM machines. The current machine type in QEMU (i.e. "virt") is renamed to "virt-2.6", whose naming scheme is similar to other architectures. For the purpose of backward compatibility, "virt" is converted to an alias, pointing to "virt-2.6". With this patch, "qemu -M ?" lists the following virtual machine types along with others: virt QEMU 2.6 ARM Virtual Machine (alias of virt-2.6) virt-2.6 QEMU 2.6 ARM Virtual Machine Signed-off-by: Wei Huang <wei@redhat.com> Message-id: 1457717778-17727-2-git-send-email-wei@redhat.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-03-16target-arm: Fix translation level on early translation faultsSergey Sorokin1-10/+12
Qemu reports translation fault on 1st level instead of 0th level in case of AArch64 address translation if the translation table walk is disabled or the address is in the gap between the two regions. Signed-off-by: Sergey Sorokin <afarallax@yandex.ru> Message-id: 1457527503-25958-1-git-send-email-afarallax@yandex.ru Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-03-16MAINTAINERS: Fix typo, block/stream.h -> block/stream.cJeff Cody1-1/+1
There is no block/stream.h, the intended filename is block/stream.c instead. Signed-off-by: Jeff Cody <jcody@redhat.com> Reviewed-by: Fam Zheng <famz@redhat.com> Message-id: b9feeac95301c1b0b1c28a485da5e3781370c31a.1457578261.git.jcody@redhat.com
2016-03-16block/sheepdog: fix argument passed to qemu_strtoul()Jeff Cody1-4/+7
The function qemu_strtoul() reads 'unsigned long' sized data, which is larger than uint32_t on 64-bit machines. Even though the snap_id field in the header is 32-bits, we must accommodate the full size in qemu_strtoul(). This patch also adds more meaningful error handling to the qemu_strtoul() call, and subsequent results. Reported-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Jeff Cody <jcody@redhat.com> Reviewed-by: Max Reitz <mreitz@redhat.com> Reviewed-by: Hitoshi Mitake <mitake.hitoshi@lab.ntt.co.jp> Message-id: e56fc50abedd9a112e0683342c8eafda063cd2f9.1456935548.git.jcody@redhat.com
2016-03-16target-arm: Implement MRS (banked) and MSR (banked) instructionsPeter Maydell3-3/+366
Starting with the ARMv7 Virtualization Extensions, the A32 and T32 instruction sets provide instructions "MSR (banked)" and "MRS (banked)" which can be used to access registers for a mode other than the current one: * R<m>_<mode> * ELR_hyp * SPSR_<mode> Implement the missing instructions. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Acked-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Message-id: 1456762734-23939-1-git-send-email-peter.maydell@linaro.org
2016-03-16loader: Fix incorrect parameter name in load_image_mr() macroJens Wiklander1-1/+1
Fix a typo in the load_image_mr() macro: 'mr' was written when the parameter name is '_mr'. (This had no visible effects since the single use of the macro used 'mr' as the argument.) Fixes 76151cacfe956248a25b38b5e8429465584f47bb "loader: Add load_image_mr() to load ROM image to a MemoryRegion" Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-03-16util/base64.c: Clean includesPeter Maydell1-2/+0
Remove unnecessary include of config-host.h. (This was missed by the clean-includes script because of the incorrect use of <> for a QEMU header.) Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Eric Blake <eblake@redhat.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-id: 1456237112-32662-5-git-send-email-peter.maydell@linaro.org
2016-03-16update-linux-headers.sh: Fake types.h doesn't need to include anythingPeter Maydell1-2/+3
We have a fake linux/types.h which we create in update-linux-headers.h. Now that every QEMU source file includes osdep.h, this fake header doesn't need to include anything at all. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Eric Blake <eblake@redhat.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-id: 1456237112-32662-4-git-send-email-peter.maydell@linaro.org
2016-03-16include/config.h: RemovePeter Maydell2-2/+0
include/config.h just includes config-target.h (and used to also include config-host.h). It is now obsolete and unused, because osdep.h does this job, so remove it. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Eric Blake <eblake@redhat.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-id: 1456237112-32662-3-git-send-email-peter.maydell@linaro.org
2016-03-16slirp/slirp.h: Remove now-empty #ifdefsPeter Maydell1-24/+0
After automatic cleanup to remove unnecessary #includes of headers that osdep.h provides, slirp.h has a few now unnecessary #ifdef/#endif pairs; remove them. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Eric Blake <eblake@redhat.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-id: 1456237112-32662-2-git-send-email-peter.maydell@linaro.org
2016-03-16Merge remote-tracking branch 'remotes/armbru/tags/pull-error-2016-03-16' ↵Peter Maydell1-21/+19
into staging Error reporting patches for 2016-03-16 # gpg: Signature made Wed 16 Mar 2016 09:57:00 GMT using RSA key ID EB918653 # gpg: Good signature from "Markus Armbruster <armbru@redhat.com>" # gpg: aka "Markus Armbruster <armbru@pond.sub.org>" * remotes/armbru/tags/pull-error-2016-03-16: error: ensure errno detail is printed with error_abort Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-03-16Merge remote-tracking branch 'remotes/armbru/tags/pull-monitor-2016-03-16' ↵Peter Maydell1-8/+34
into staging Monitor patches for 2016-03-16 # gpg: Signature made Wed 16 Mar 2016 09:47:23 GMT using RSA key ID EB918653 # gpg: Good signature from "Markus Armbruster <armbru@redhat.com>" # gpg: aka "Markus Armbruster <armbru@pond.sub.org>" * remotes/armbru/tags/pull-monitor-2016-03-16: qdev-monitor: add missing aliases for virtio device classes qdev-monitor: sort alias table by typename qdev-monitor: improve error message when alias device is unavailable Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-03-16Merge remote-tracking branch 'remotes/dgibson/tags/ppc-for-2.6-20160316' ↵Peter Maydell17-446/+644
into staging ppc patch queue for 2016-03-16 Accumulated patches for target-ppc, pseries machine type and related devices. As we are now in soft freeze, these are mostly fixes. * Fix KVM migration for several SPRs that qemu didn't handle * Clean up handling of SDR1, which allows a fix to the gdbstub * Fix a race in spapr_rng * Fix a bug with multifunction hotplug The exception is the 7 patches to allow EEH on spapr-pci-host-bridge devices (rather than the special and poorly designed spapr-vfio-pci-host-bridge device). I believe these are low risk of breaking non-EEH cases, and EEH cases were little used in practice previously (since libvirt did not support the special device amongst other things). It did have a draft posted before the soft freeze, removes a very ugly VFIO interface, and removes device we'd like to deprecate sooner rather than later. So, I'm hoping we can squeeze these in during the soft freeze. This includes two patches to the VFIO code, which Alex Williamson has indicated he's ok with coming through my tree. # gpg: Signature made Wed 16 Mar 2016 05:04:52 GMT using RSA key ID 20D9B392 # gpg: Good signature from "David Gibson <david@gibson.dropbear.id.au>" # gpg: aka "David Gibson (Red Hat) <dgibson@redhat.com>" # gpg: aka "David Gibson (ozlabs.org) <dgibson@ozlabs.org>" # gpg: WARNING: This key is not certified with sufficiently trusted signatures! # gpg: It is not certain that the signature belongs to the owner. # Primary key fingerprint: 75F4 6586 AE61 A66C C44E 87DC 6C38 CACA 20D9 B392 * remotes/dgibson/tags/ppc-for-2.6-20160316: vfio: Eliminate vfio_container_ioctl() spapr_pci: Remove finish_realize hook spapr_pci: (Mostly) remove spapr-pci-vfio-host-bridge spapr_pci: Allow EEH on spapr-pci-host-bridge spapr_pci: Eliminate class callbacks spapr_pci: Switch to vfio_eeh_as_op() interface vfio: Start improving VFIO/EEH interface spapr_rng: fix race with main loop target-ppc: Eliminate kvmppc_kern_htab global target-ppc: Add helpers for updating a CPU's SDR1 and external HPT target-ppc: Split out SREGS get/put functions spapr_pci: fix multifunction hotplug target-ppc: Add PVR for POWER8NVL processor ppc: Add a few more P8 PMU SPRs ppc: Fix migration of the TAR SPR ppc: Define the PSPB register on POWER8 Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-03-16error: ensure errno detail is printed with error_abortDaniel P. Berrange1-21/+19
When &error_abort is passed in, the error reporting code will print the current error message and then abort() the process. Unfortunately at the time it aborts, we've not yet appended the errno detail. This makes debugging certain problems significantly harder as the log is incomplete. Signed-off-by: Daniel P. Berrange <berrange@redhat.com> Message-Id: <1457544504-8548-22-git-send-email-berrange@redhat.com> Signed-off-by: Markus Armbruster <armbru@redhat.com>
2016-03-16Merge remote-tracking branch 'remotes/mst/tags/for_upstream' into stagingPeter Maydell2-0/+0
acpi: minor fix Since previous pull acpi test triggers warnings, fix it up. Signed-off-by: Michael S. Tsirkin <mst@redhat.com> # gpg: Signature made Tue 15 Mar 2016 21:26:38 GMT using RSA key ID D28D5469 # gpg: Good signature from "Michael S. Tsirkin <mst@kernel.org>" # gpg: aka "Michael S. Tsirkin <mst@redhat.com>" * remotes/mst/tags/for_upstream: acpi-test: update UID for GSI links Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-03-16qdev-monitor: add missing aliases for virtio device classesSascha Silbe1-0/+19
virtio-{blk,balloon,net,serial} are aliases for their actual, architecture-dependent implementations (*-ccw on s390x, *-pci on other architectures supporting virtio). This makes it a lot easier to craft qemu invocations that work on all supported architectures. Complete the set to cover all existing non-abstract virtio device classes. For virtio-balloon, only the CCW implementation was missing. Signed-off-by: Sascha Silbe <silbe@linux.vnet.ibm.com> Message-Id: <1455831854-49013-4-git-send-email-silbe@linux.vnet.ibm.com> Reviewed-by: Cornelia Huck <cornelia.huck@de.ibm.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Markus Armbruster <armbru@redhat.com>
2016-03-16qdev-monitor: sort alias table by typenameSascha Silbe1-7/+8
Sort the alias table by typename so it's easier to see which aliases exist. Signed-off-by: Sascha Silbe <silbe@linux.vnet.ibm.com> Message-Id: <1455831854-49013-3-git-send-email-silbe@linux.vnet.ibm.com> Reviewed-by: Halil Pasic <pasic@linux.vnet.ibm.com> Reviewed-by: Cornelia Huck <cornelia.huck@de.ibm.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Markus Armbruster <armbru@redhat.com>
2016-03-16qdev-monitor: improve error message when alias device is unavailableSascha Silbe1-1/+7
When trying to instantiate an alias that points to a device class that doesn't exist, the error message looks like qemu misunderstood the request: $ s390x-softmmu/qemu-system-s390x -device virtio-gpu qemu-system-s390x: -device virtio-gpu: 'virtio-gpu-ccw' is not a valid device model name Special-case the error message to make it explicit that alias expansion is going on: $ s390x-softmmu/qemu-system-s390x -device virtio-gpu qemu-system-s390x: -device virtio-gpu: 'virtio-gpu' (alias 'virtio-gpu-ccw') is not a valid device model name Suggested-By: Cornelia Huck <cornelia.huck@de.ibm.com> Signed-off-by: Sascha Silbe <silbe@linux.vnet.ibm.com> Message-Id: <1455831854-49013-2-git-send-email-silbe@linux.vnet.ibm.com> Reviewed-by: Cornelia Huck <cornelia.huck@de.ibm.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Markus Armbruster <armbru@redhat.com>
2016-03-16vfio: Eliminate vfio_container_ioctl()David Gibson2-47/+0
vfio_container_ioctl() was a bad interface that bypassed abstraction boundaries, had semantics that sat uneasily with its name, and was unsafe in many realistic circumstances. Now that spapr-pci-vfio-host-bridge has been folded into spapr-pci-host-bridge, there are no more users, so remove it. Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Reviewed-by: Alexey Kardashevskiy <aik@ozlabs.ru> Acked-by: Alex Williamson <alex.williamson@redhat.com>
2016-03-16spapr_pci: Remove finish_realize hookDavid Gibson2-32/+5
Now that spapr-pci-vfio-host-bridge is reduced to just a stub, there is only one implementation of the finish_realize hook in sPAPRPHBClass. So, we can fold that implementation into its (single) caller, and remove the hook. That's the last thing left in sPAPRPHBClass, so that can go away as well. Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Reviewed-by: Alexey Kardashevskiy <aik@ozlabs.ru>
2016-03-16spapr_pci: (Mostly) remove spapr-pci-vfio-host-bridgeDavid Gibson2-55/+17
Now that the regular spapr-pci-host-bridge can handle EEH, there are only two things that spapr-pci-vfio-host-bridge does differently: 1. automatically sizes its DMA window to match the host IOMMU 2. checks if the attached VFIO container is backed by the VFIO_SPAPR_TCE_IOMMU type on the host (1) is not particularly useful, since the default window used by the regular host bridge will work with the host IOMMU configuration on all current systems anyway. Plus, automatically changing guest visible configuration (such as the DMA window) based on host settings is generally a bad idea. It's not definitively broken, since spapr-pci-vfio-host-bridge is only supposed to support VFIO devices which can't be migrated anyway, but still. (2) is not really useful, because if a guest tries to configure EEH on a different host IOMMU, the first call will fail and that will be that. It's possible there are scripts or tools out there which expect spapr-pci-vfio-host-bridge, so we don't remove it entirely. This patch reduces it to just a stub for backwards compatibility. Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Reviewed-by: Alexey Kardashevskiy <aik@ozlabs.ru>
2016-03-16spapr_pci: Allow EEH on spapr-pci-host-bridgeDavid Gibson3-10/+12
Now that the EEH code is independent of the special spapr-vfio-pci-host-bridge device, we can allow it on all spapr PCI host bridges instead. We do this by changing spapr_phb_eeh_available() to be based on the vfio_eeh_as_ok() call instead of the host bridge class. Because the value of vfio_eeh_as_ok() can change with devices being hotplugged or unplugged, this can potentially lead to some strange edge cases where the guest starts using EEH, then it starts failing because of a change in status. However, it's not really any worse than the current situation. Cases that would have worked previously will still work (i.e. VFIO devices from at most one VFIO IOMMU group per vPHB), it's just that it's no longer necessary to use spapr-vfio-pci-host-bridge with the groupid pre-specified. Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Reviewed-by: Alexey Kardashevskiy <aik@ozlabs.ru>
2016-03-16spapr_pci: Eliminate class callbacksDavid Gibson3-37/+62
The EEH operations in the spapr-vfio-pci-host-bridge no longer rely on the special groupid field in sPAPRPHBVFIOState. So we can simplify, removing the class specific callbacks with direct calls based on a simple spapr_phb_eeh_enabled() helper. For now we implement that in terms of a boolean in the class, but we'll continue to clean that up later. On its own this is a rather strange way of doing things, but it's a useful intermediate step to further cleanups. Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Reviewed-by: Alexey Kardashevskiy <aik@ozlabs.ru>
2016-03-16spapr_pci: Switch to vfio_eeh_as_op() interfaceDavid Gibson1-34/+16
This switches all EEH on VFIO operations in spapr_pci_vfio.c from the broken vfio_container_ioctl() interface to the new vfio_as_eeh_op() interface. Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Reviewed-by: Alexey Kardashevskiy <aik@ozlabs.ru>
2016-03-16vfio: Start improving VFIO/EEH interfaceDavid Gibson2-0/+97
At present the code handling IBM's Enhanced Error Handling (EEH) interface on VFIO devices operates by bypassing the usual VFIO logic with vfio_container_ioctl(). That's a poorly designed interface with unclear semantics about exactly what can be operated on. In particular it operates on a single vfio container internally (hence the name), but takes an address space and group id, from which it deduces the container in a rather roundabout way. groupids are something that code outside vfio shouldn't even be aware of. This patch creates new interfaces for EEH operations. Internally we have vfio_eeh_container_op() which takes a VFIOContainer object directly. For external use we have vfio_eeh_as_ok() which determines if an AddressSpace is usable for EEH (at present this means it has a single container with exactly one group attached), and vfio_eeh_as_op() which will perform an operation on an AddressSpace in the unambiguous case, and otherwise returns an error. This interface still isn't great, but it's enough of an improvement to allow a number of cleanups in other places. Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Reviewed-by: Alexey Kardashevskiy <aik@ozlabs.ru> Acked-by: Alex Williamson <alex.williamson@redhat.com>
2016-03-16spapr_rng: fix race with main loopGreg Kurz1-2/+2
Since commit "60253ed1e6ec rng: add request queue support to rng-random", the use of a spapr_rng device may hang vCPU threads. The following path is taken without holding the lock to the main loop mutex: h_random() rng_backend_request_entropy() rng_random_request_entropy() qemu_set_fd_handler() The consequence is that entropy_available() may be called before the vCPU thread could even queue the request: depending on the scheduling, it may happen that entropy_available() does not call random_recv()->qemu_sem_post(). The vCPU thread will then sleep forever in h_random()->qemu_sem_wait(). This could not happen before 60253ed1e6ec because entropy_available() used to call random_recv() unconditionally. This patch ensures the lock is held to avoid the race. Signed-off-by: Greg Kurz <gkurz@linux.vnet.ibm.com> Reviewed-by: Cédric Le Goater <clg@fr.ibm.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2016-03-16target-ppc: Eliminate kvmppc_kern_htab globalDavid Gibson4-35/+27
fa48b43 "target-ppc: Remove hack for ppc_hash64_load_hpte*() with HV KVM" purports to remove a hack in the handling of hash page tables (HPTs) managed by KVM instead of qemu. However, it actually went in the wrong direction. That patch requires anything looking for an external HPT (that is one not managed by the guest itself) to check both env->external_htab (for a qemu managed HPT) and kvmppc_kern_htab (for a KVM managed HPT). That's a problem because kvmppc_kern_htab is local to mmu-hash64.c, but some places which need to check for an external HPT are outside that, such as kvm_arch_get_registers(). The latter was subtly broken by the earlier patch such that gdbstub can no longer access memory. Basically a KVM managed HPT is much more like a qemu managed HPT than it is like a guest managed HPT, so the original "hack" was actually on the right track. This partially reverts fa48b43, so we again mark a KVM managed external HPT by putting a special but non-NULL value in env->external_htab. It then goes further, using that marker to eliminate the kvmppc_kern_htab global entirely. The ppc_hash64_set_external_hpt() helper function is extended to set that marker if passed a NULL value (if you're setting an external HPT, but don't have an actual HPT to set, the assumption is that it must be a KVM managed HPT). This also has some flow-on changes to the HPT access helpers, required by the above changes. Reported-by: Greg Kurz <gkurz@linux.vnet.ibm.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Greg Kurz <gkurz@linux.vnet.ibm.com> Tested-by: Greg Kurz <gkurz@linux.vnet.ibm.com>
2016-03-16target-ppc: Add helpers for updating a CPU's SDR1 and external HPTDavid Gibson6-19/+64
When a Power cpu with 64-bit hash MMU has it's hash page table (HPT) pointer updated by a write to the SDR1 register we need to update some derived variables. Likewise, when the cpu is configured for an external HPT (one not in the guest memory space) some derived variables need to be updated. Currently the logic for this is (partially) duplicated in ppc_store_sdr1() and in spapr_cpu_reset(). In future we're going to need it in some other places, so make some common helpers for this update. In addition the new ppc_hash64_set_external_hpt() helper also updates SDR1 in KVM - it's not updated by the normal runtime KVM <-> qemu CPU synchronization. In a sense this belongs logically in the ppc_hash64_set_sdr1() helper, but that is called from kvm_arch_get_registers() so can't itself call cpu_synchronize_state() without infinite recursion. In practice this doesn't matter because the only other caller is TCG specific. Currently there aren't situations where updating SDR1 at runtime in KVM matters, but there are going to be in future. Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Reviewed-by: Greg Kurz <gkurz@linux.vnet.ibm.com> Reviewed-by: Thomas Huth <thuth@redhat.com>
2016-03-16target-ppc: Split out SREGS get/put functionsDavid Gibson1-193/+228
Currently the getting and setting of Power MMU registers (sregs) take up large inline chunks of the kvm_arch_get_registers() and kvm_arch_put_registers() functions. Especially since there are two variants (for Book-E and Book-S CPUs), only one of which will be used in practice, this is pretty hard to read. This patch splits these out into helper functions for clarity. No functional change is expected. Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Alexey Kardashevskiy <aik@ozlabs.ru> Reviewed-by: Greg Kurz <gkurz@linux.vnet.ibm.com>
2016-03-16spapr_pci: fix multifunction hotplugMichael Roth1-7/+86
Since 3f1e147, QEMU has adopted a convention of supporting function hotplug by deferring hotplug events until func 0 is hotplugged. This is likely how management tools like libvirt would expose such support going forward. Since sPAPR guests rely on per-func events rather than slot-based, our protocol has been to hotplug func 0 *first* to avoid cases where devices appear within guests without func 0 present to avoid undefined behavior. To remain compatible with new convention, defer hotplug in a similar manner, but then generate events in 0-first order as we did in the past. Once func 0 present, fail any attempts to plug additional functions (as we do with PCIe). For unplug, defer unplug operations in a similar manner, but generate unplug events such that function 0 is removed last in guest. Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2016-03-16target-ppc: Add PVR for POWER8NVL processorAlexey Kardashevskiy3-0/+8
This adds a new POWER8+NVLink CPU PVR which core is identical to POWER8 but has a different PVR. The only available machine now has PVR pvr 004c 0100 so this defines "POWER8NVL" alias as v1.0. The corresponding kernel commit is https://github.com/torvalds/linux/commit/ddee09c099c3 "powerpc: Add PVR for POWER8NVL processor" Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2016-03-16ppc: Add a few more P8 PMU SPRsBenjamin Herrenschmidt2-0/+35
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-23 20:07:18 +0000