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-rw-r--r--hw/dec_pci.c4
-rw-r--r--hw/grackle_pci.c4
-rw-r--r--hw/pci_host.c81
-rw-r--r--hw/pci_host.h6
-rw-r--r--hw/ppc4xx_pci.c2
-rw-r--r--hw/ppce500_pci.c4
-rw-r--r--hw/unin_pci.c12
7 files changed, 67 insertions, 46 deletions
diff --git a/hw/dec_pci.c b/hw/dec_pci.c
index fb4973bb7c..024c67ce70 100644
--- a/hw/dec_pci.c
+++ b/hw/dec_pci.c
@@ -69,8 +69,8 @@ static int pci_dec_21154_init_device(SysBusDevice *dev)
s = FROM_SYSBUS(DECState, dev);
- pci_mem_config = pci_host_conf_register_mmio(&s->host_state);
- pci_mem_data = pci_host_data_register_mmio(&s->host_state);
+ pci_mem_config = pci_host_conf_register_mmio(&s->host_state, 1);
+ pci_mem_data = pci_host_data_register_mmio(&s->host_state, 1);
sysbus_init_mmio(dev, 0x1000, pci_mem_config);
sysbus_init_mmio(dev, 0x1000, pci_mem_data);
return 0;
diff --git a/hw/grackle_pci.c b/hw/grackle_pci.c
index c026bf2afb..aa0c51b88a 100644
--- a/hw/grackle_pci.c
+++ b/hw/grackle_pci.c
@@ -108,8 +108,8 @@ static int pci_grackle_init_device(SysBusDevice *dev)
s = FROM_SYSBUS(GrackleState, dev);
- pci_mem_config = pci_host_conf_register_mmio(&s->host_state);
- pci_mem_data = pci_host_data_register_mmio(&s->host_state);
+ pci_mem_config = pci_host_conf_register_mmio(&s->host_state, 1);
+ pci_mem_data = pci_host_data_register_mmio(&s->host_state, 1);
sysbus_init_mmio(dev, 0x1000, pci_mem_config);
sysbus_init_mmio(dev, 0x1000, pci_mem_data);
diff --git a/hw/pci_host.c b/hw/pci_host.c
index 05896af571..c18cfba932 100644
--- a/hw/pci_host.c
+++ b/hw/pci_host.c
@@ -78,27 +78,24 @@ uint32_t pci_data_read(PCIBus *s, uint32_t addr, int len)
return val;
}
-static void pci_host_config_write(ReadWriteHandler *handler,
- pcibus_t addr, uint32_t val, int len)
+static void pci_host_config_write_swap(ReadWriteHandler *handler,
+ pcibus_t addr, uint32_t val, int len)
{
PCIHostState *s = container_of(handler, PCIHostState, conf_handler);
PCI_DPRINTF("%s addr %" FMT_PCIBUS " %d val %"PRIx32"\n",
__func__, addr, len, val);
-#ifdef TARGET_WORDS_BIGENDIAN
val = qemu_bswap_len(val, len);
-#endif
s->config_reg = val;
}
-static uint32_t pci_host_config_read(ReadWriteHandler *handler,
- pcibus_t addr, int len)
+static uint32_t pci_host_config_read_swap(ReadWriteHandler *handler,
+ pcibus_t addr, int len)
{
PCIHostState *s = container_of(handler, PCIHostState, conf_handler);
uint32_t val = s->config_reg;
-#ifdef TARGET_WORDS_BIGENDIAN
+
val = qemu_bswap_len(val, len);
-#endif
PCI_DPRINTF("%s addr %" FMT_PCIBUS " len %d val %"PRIx32"\n",
__func__, addr, len, val);
return val;
@@ -125,21 +122,20 @@ static uint32_t pci_host_config_read_noswap(ReadWriteHandler *handler,
return val;
}
-static void pci_host_data_write(ReadWriteHandler *handler,
- pcibus_t addr, uint32_t val, int len)
+static void pci_host_data_write_swap(ReadWriteHandler *handler,
+ pcibus_t addr, uint32_t val, int len)
{
PCIHostState *s = container_of(handler, PCIHostState, data_handler);
-#ifdef TARGET_WORDS_BIGENDIAN
+
val = qemu_bswap_len(val, len);
-#endif
PCI_DPRINTF("write addr %" FMT_PCIBUS " len %d val %x\n",
addr, len, val);
if (s->config_reg & (1u << 31))
pci_data_write(s->bus, s->config_reg | (addr & 3), val, len);
}
-static uint32_t pci_host_data_read(ReadWriteHandler *handler,
- pcibus_t addr, int len)
+static uint32_t pci_host_data_read_swap(ReadWriteHandler *handler,
+ pcibus_t addr, int len)
{
PCIHostState *s = container_of(handler, PCIHostState, data_handler);
uint32_t val;
@@ -148,32 +144,53 @@ static uint32_t pci_host_data_read(ReadWriteHandler *handler,
val = pci_data_read(s->bus, s->config_reg | (addr & 3), len);
PCI_DPRINTF("read addr %" FMT_PCIBUS " len %d val %x\n",
addr, len, val);
-#ifdef TARGET_WORDS_BIGENDIAN
val = qemu_bswap_len(val, len);
-#endif
return val;
}
-static void pci_host_init(PCIHostState *s)
+static void pci_host_data_write_noswap(ReadWriteHandler *handler,
+ pcibus_t addr, uint32_t val, int len)
{
- s->conf_handler.write = pci_host_config_write;
- s->conf_handler.read = pci_host_config_read;
- s->conf_noswap_handler.write = pci_host_config_write_noswap;
- s->conf_noswap_handler.read = pci_host_config_read_noswap;
- s->data_handler.write = pci_host_data_write;
- s->data_handler.read = pci_host_data_read;
+ PCIHostState *s = container_of(handler, PCIHostState, data_handler);
+ PCI_DPRINTF("write addr %" FMT_PCIBUS " len %d val %x\n",
+ addr, len, val);
+ if (s->config_reg & (1u << 31))
+ pci_data_write(s->bus, s->config_reg | (addr & 3), val, len);
}
-int pci_host_conf_register_mmio(PCIHostState *s)
+static uint32_t pci_host_data_read_noswap(ReadWriteHandler *handler,
+ pcibus_t addr, int len)
{
- pci_host_init(s);
- return cpu_register_io_memory_simple(&s->conf_handler);
+ PCIHostState *s = container_of(handler, PCIHostState, data_handler);
+ uint32_t val;
+ if (!(s->config_reg & (1 << 31)))
+ return 0xffffffff;
+ val = pci_data_read(s->bus, s->config_reg | (addr & 3), len);
+ PCI_DPRINTF("read addr %" FMT_PCIBUS " len %d val %x\n",
+ addr, len, val);
+ return val;
}
-int pci_host_conf_register_mmio_noswap(PCIHostState *s)
+static void pci_host_init(PCIHostState *s)
+{
+ s->conf_handler.write = pci_host_config_write_swap;
+ s->conf_handler.read = pci_host_config_read_swap;
+ s->conf_noswap_handler.write = pci_host_config_write_noswap;
+ s->conf_noswap_handler.read = pci_host_config_read_noswap;
+ s->data_handler.write = pci_host_data_write_swap;
+ s->data_handler.read = pci_host_data_read_swap;
+ s->data_noswap_handler.write = pci_host_data_write_noswap;
+ s->data_noswap_handler.read = pci_host_data_read_noswap;
+}
+
+int pci_host_conf_register_mmio(PCIHostState *s, int swap)
{
pci_host_init(s);
- return cpu_register_io_memory_simple(&s->conf_noswap_handler);
+ if (swap) {
+ return cpu_register_io_memory_simple(&s->conf_handler);
+ } else {
+ return cpu_register_io_memory_simple(&s->conf_noswap_handler);
+ }
}
void pci_host_conf_register_ioport(pio_addr_t ioport, PCIHostState *s)
@@ -182,10 +199,14 @@ void pci_host_conf_register_ioport(pio_addr_t ioport, PCIHostState *s)
register_ioport_simple(&s->conf_noswap_handler, ioport, 4, 4);
}
-int pci_host_data_register_mmio(PCIHostState *s)
+int pci_host_data_register_mmio(PCIHostState *s, int swap)
{
pci_host_init(s);
- return cpu_register_io_memory_simple(&s->data_handler);
+ if (swap) {
+ return cpu_register_io_memory_simple(&s->data_handler);
+ } else {
+ return cpu_register_io_memory_simple(&s->data_noswap_handler);
+ }
}
void pci_host_data_register_ioport(pio_addr_t ioport, PCIHostState *s)
diff --git a/hw/pci_host.h b/hw/pci_host.h
index 5ff64430ed..bd8ede8b72 100644
--- a/hw/pci_host.h
+++ b/hw/pci_host.h
@@ -35,6 +35,7 @@ struct PCIHostState {
SysBusDevice busdev;
ReadWriteHandler conf_noswap_handler;
ReadWriteHandler conf_handler;
+ ReadWriteHandler data_noswap_handler;
ReadWriteHandler data_handler;
uint32_t config_reg;
PCIBus *bus;
@@ -44,9 +45,8 @@ void pci_data_write(PCIBus *s, uint32_t addr, uint32_t val, int len);
uint32_t pci_data_read(PCIBus *s, uint32_t addr, int len);
/* for mmio */
-int pci_host_conf_register_mmio(PCIHostState *s);
-int pci_host_conf_register_mmio_noswap(PCIHostState *s);
-int pci_host_data_register_mmio(PCIHostState *s);
+int pci_host_conf_register_mmio(PCIHostState *s, int swap);
+int pci_host_data_register_mmio(PCIHostState *s, int swap);
/* for ioio */
void pci_host_conf_register_ioport(pio_addr_t ioport, PCIHostState *s);
diff --git a/hw/ppc4xx_pci.c b/hw/ppc4xx_pci.c
index 2d00b61228..c9e3279544 100644
--- a/hw/ppc4xx_pci.c
+++ b/hw/ppc4xx_pci.c
@@ -378,7 +378,7 @@ PCIBus *ppc4xx_pci_init(CPUState *env, qemu_irq pci_irqs[4],
cpu_register_physical_memory(config_space + PCIC0_CFGADDR, 4, index);
/* CFGDATA */
- index = pci_host_data_register_mmio(&controller->pci_state);
+ index = pci_host_data_register_mmio(&controller->pci_state, 1);
if (index < 0)
goto free;
cpu_register_physical_memory(config_space + PCIC0_CFGDATA, 4, index);
diff --git a/hw/ppce500_pci.c b/hw/ppce500_pci.c
index a72fb86d2e..683e6577b6 100644
--- a/hw/ppce500_pci.c
+++ b/hw/ppce500_pci.c
@@ -293,13 +293,13 @@ PCIBus *ppce500_pci_init(qemu_irq pci_irqs[4], target_phys_addr_t registers)
controller->pci_dev = d;
/* CFGADDR */
- index = pci_host_conf_register_mmio_noswap(&controller->pci_state);
+ index = pci_host_conf_register_mmio(&controller->pci_state, 0);
if (index < 0)
goto free;
cpu_register_physical_memory(registers + PCIE500_CFGADDR, 4, index);
/* CFGDATA */
- index = pci_host_data_register_mmio(&controller->pci_state);
+ index = pci_host_data_register_mmio(&controller->pci_state, 0);
if (index < 0)
goto free;
cpu_register_physical_memory(registers + PCIE500_CFGDATA, 4, index);
diff --git a/hw/unin_pci.c b/hw/unin_pci.c
index 7bdf430346..a4866f475b 100644
--- a/hw/unin_pci.c
+++ b/hw/unin_pci.c
@@ -155,7 +155,7 @@ static int pci_unin_main_init_device(SysBusDevice *dev)
/* Uninorth main bus */
s = FROM_SYSBUS(UNINState, dev);
- pci_mem_config = pci_host_conf_register_mmio(&s->host_state);
+ pci_mem_config = pci_host_conf_register_mmio(&s->host_state, 1);
s->data_handler.read = unin_data_read;
s->data_handler.write = unin_data_write;
pci_mem_data = cpu_register_io_memory_simple(&s->data_handler);
@@ -175,7 +175,7 @@ static int pci_u3_agp_init_device(SysBusDevice *dev)
/* Uninorth U3 AGP bus */
s = FROM_SYSBUS(UNINState, dev);
- pci_mem_config = pci_host_conf_register_mmio(&s->host_state);
+ pci_mem_config = pci_host_conf_register_mmio(&s->host_state, 1);
s->data_handler.read = unin_data_read;
s->data_handler.write = unin_data_write;
pci_mem_data = cpu_register_io_memory_simple(&s->data_handler);
@@ -196,8 +196,8 @@ static int pci_unin_agp_init_device(SysBusDevice *dev)
/* Uninorth AGP bus */
s = FROM_SYSBUS(UNINState, dev);
- pci_mem_config = pci_host_conf_register_mmio_noswap(&s->host_state);
- pci_mem_data = pci_host_data_register_mmio(&s->host_state);
+ pci_mem_config = pci_host_conf_register_mmio(&s->host_state, 0);
+ pci_mem_data = pci_host_data_register_mmio(&s->host_state, 1);
sysbus_init_mmio(dev, 0x1000, pci_mem_config);
sysbus_init_mmio(dev, 0x1000, pci_mem_data);
return 0;
@@ -211,8 +211,8 @@ static int pci_unin_internal_init_device(SysBusDevice *dev)
/* Uninorth internal bus */
s = FROM_SYSBUS(UNINState, dev);
- pci_mem_config = pci_host_conf_register_mmio_noswap(&s->host_state);
- pci_mem_data = pci_host_data_register_mmio(&s->host_state);
+ pci_mem_config = pci_host_conf_register_mmio(&s->host_state, 0);
+ pci_mem_data = pci_host_data_register_mmio(&s->host_state, 1);
sysbus_init_mmio(dev, 0x1000, pci_mem_config);
sysbus_init_mmio(dev, 0x1000, pci_mem_data);
return 0;
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-27 23:55:48 +0000