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-rw-r--r--hw/microblaze_pic_cpu.c2
-rw-r--r--hw/microblaze_pic_cpu.h8
-rw-r--r--hw/petalogix_ml605_mmu.c1
-rw-r--r--hw/petalogix_s3adsp1800_mmu.c2
-rw-r--r--hw/xilinx.h3
5 files changed, 12 insertions, 4 deletions
diff --git a/hw/microblaze_pic_cpu.c b/hw/microblaze_pic_cpu.c
index 7c59382fbe..9ad48b4b95 100644
--- a/hw/microblaze_pic_cpu.c
+++ b/hw/microblaze_pic_cpu.c
@@ -24,6 +24,7 @@
#include "hw.h"
#include "pc.h"
+#include "microblaze_pic_cpu.h"
#define D(x)
@@ -43,7 +44,6 @@ static void microblaze_pic_cpu_handler(void *opaque, int irq, int level)
cpu_reset_interrupt(env, type);
}
-qemu_irq *microblaze_pic_init_cpu(CPUState *env);
qemu_irq *microblaze_pic_init_cpu(CPUState *env)
{
return qemu_allocate_irqs(microblaze_pic_cpu_handler, env, 2);
diff --git a/hw/microblaze_pic_cpu.h b/hw/microblaze_pic_cpu.h
new file mode 100644
index 0000000000..4c76275976
--- /dev/null
+++ b/hw/microblaze_pic_cpu.h
@@ -0,0 +1,8 @@
+#ifndef MICROBLAZE_PIC_CPU_H
+#define MICROBLAZE_PIC_CPU_H
+
+#include "qemu-common.h"
+
+qemu_irq *microblaze_pic_init_cpu(CPUState *env);
+
+#endif /* MICROBLAZE_PIC_CPU_H */
diff --git a/hw/petalogix_ml605_mmu.c b/hw/petalogix_ml605_mmu.c
index e3a66e51b6..e3ca310efd 100644
--- a/hw/petalogix_ml605_mmu.c
+++ b/hw/petalogix_ml605_mmu.c
@@ -39,6 +39,7 @@
#include "blockdev.h"
#include "pc.h"
+#include "microblaze_pic_cpu.h"
#include "xilinx_axidma.h"
#define LMB_BRAM_SIZE (128 * 1024)
diff --git a/hw/petalogix_s3adsp1800_mmu.c b/hw/petalogix_s3adsp1800_mmu.c
index 589e8cabb0..a43fb4c95c 100644
--- a/hw/petalogix_s3adsp1800_mmu.c
+++ b/hw/petalogix_s3adsp1800_mmu.c
@@ -36,6 +36,8 @@
#include "elf.h"
#include "blockdev.h"
+#include "microblaze_pic_cpu.h"
+
#define LMB_BRAM_SIZE (128 * 1024)
#define FLASH_SIZE (16 * 1024 * 1024)
diff --git a/hw/xilinx.h b/hw/xilinx.h
index 3a1f4c6907..35f35bd7fc 100644
--- a/hw/xilinx.h
+++ b/hw/xilinx.h
@@ -1,9 +1,6 @@
#include "qemu-common.h"
#include "net.h"
-/* OPB Interrupt Controller. */
-qemu_irq *microblaze_pic_init_cpu(CPUState *env);
-
static inline DeviceState *
xilinx_intc_create(target_phys_addr_t base, qemu_irq irq, int kind_of_intr)
{