diff options
-rw-r--r-- | hw/petalogix_s3adsp1800_mmu.c | 184 | ||||
-rw-r--r-- | hw/xilinx.h | 50 | ||||
-rw-r--r-- | target-microblaze/machine.c | 11 |
3 files changed, 245 insertions, 0 deletions
diff --git a/hw/petalogix_s3adsp1800_mmu.c b/hw/petalogix_s3adsp1800_mmu.c new file mode 100644 index 0000000000..b31751579b --- /dev/null +++ b/hw/petalogix_s3adsp1800_mmu.c @@ -0,0 +1,184 @@ +/* + * Model of Petalogix linux reference design targeting Xilinx Spartan 3ADSP-1800 + * boards. + * + * Copyright (c) 2009 Edgar E. Iglesias. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "sysbus.h" +#include "hw.h" +#include "net.h" +#include "flash.h" +#include "sysemu.h" +#include "devices.h" +#include "boards.h" +#include "device_tree.h" +#include "xilinx.h" + +#define LMB_BRAM_SIZE (128 * 1024) +#define FLASH_SIZE (16 * 1024 * 1024) + +static uint32_t bootstrap_pc; + +static void main_cpu_reset(void *opaque) +{ + CPUState *env = opaque; + cpu_reset(env); + env->sregs[SR_PC] = bootstrap_pc; +} + +#define BINARY_DEVICE_TREE_FILE "petalogix-s3adsp1800.dtb" +static int petalogix_load_device_tree(target_phys_addr_t addr, + uint32_t ramsize, + target_phys_addr_t initrd_base, + target_phys_addr_t initrd_size, + const char *kernel_cmdline) +{ + void *fdt; + char *path = NULL; + int fdt_size; + int pathlen; + int r; + + /* Try the local "mb.dtb" override. */ + fdt = load_device_tree("mb.dtb", &fdt_size); + if (!fdt) { + pathlen = snprintf(NULL, 0, "%s/%s", + bios_dir, BINARY_DEVICE_TREE_FILE) + 1; + path = qemu_malloc(pathlen); + snprintf(path, pathlen, "%s/%s", bios_dir, BINARY_DEVICE_TREE_FILE); + fdt = load_device_tree(BINARY_DEVICE_TREE_FILE, &fdt_size); + free(path); + if (!fdt) + return 0; + } + + r = qemu_devtree_setprop_string(fdt, "/chosen", "bootargs", kernel_cmdline); + if (r < 0) + fprintf(stderr, "couldn't set /chosen/bootargs\n"); + printf("write fdt to addr=%x fdtsize=%d\n", addr, fdt_size); + cpu_physical_memory_write (addr, (void *)fdt, fdt_size); + return fdt_size; +} + +static void +petalogix_s3adsp1800_init(ram_addr_t ram_size, + const char *boot_device, + const char *kernel_filename, + const char *kernel_cmdline, + const char *initrd_filename, const char *cpu_model) +{ + DeviceState *dev; + CPUState *env; + int kernel_size; + int i; + target_phys_addr_t ddr_base = 0x90000000; + ram_addr_t phys_lmb_bram; + ram_addr_t phys_ram; + ram_addr_t phys_flash; + qemu_irq irq[32], *cpu_irq; + + /* init CPUs */ + if (cpu_model == NULL) { + cpu_model = "microblaze"; + } + env = cpu_init(cpu_model); + + env->pvr.regs[10] = 0x0c000000; /* spartan 3a dsp family. */ + qemu_register_reset(main_cpu_reset, 0, env); + + /* Attach emulated BRAM through the LMB. */ + phys_lmb_bram = qemu_ram_alloc(LMB_BRAM_SIZE); + cpu_register_physical_memory(0x00000000, LMB_BRAM_SIZE, + phys_lmb_bram | IO_MEM_RAM); + + phys_ram = qemu_ram_alloc(ram_size); + cpu_register_physical_memory(ddr_base, ram_size, phys_ram | IO_MEM_RAM); + + phys_flash = qemu_ram_alloc(FLASH_SIZE); + i = drive_get_index(IF_PFLASH, 0, 0); + pflash_cfi02_register(0xa0000000, phys_flash, + i != -1 ? drives_table[i].bdrv : NULL, (64 * 1024), + FLASH_SIZE >> 16, + 1, 1, 0x0000, 0x0000, 0x0000, 0x0000, + 0x555, 0x2aa); + + cpu_irq = microblaze_pic_init_cpu(env); + dev = xilinx_intc_create(0x81800000, cpu_irq[0], 2); + for (i = 0; i < 32; i++) { + irq[i] = qdev_get_gpio_in(dev, i); + } + + sysbus_create_simple("xilinx,uartlite", 0x84000000, irq[3]); + /* 2 timers at irq 2 @ 62 Mhz. */ + xilinx_timer_create(0x83c00000, irq[0], 2, 62 * 1000000); + xilinx_ethlite_create(&nd_table[0], 0x81000000, irq[1], 0, 0); + + if (kernel_filename) { + uint64_t entry, low, high; + int kcmdline_len; + uint32_t base32; + + /* Boots a kernel elf binary. */ + kernel_size = load_elf(kernel_filename, 0, + &entry, &low, &high); + base32 = entry; + if (base32 == 0xc0000000) { + kernel_size = load_elf(kernel_filename, -0x30000000LL, + &entry, NULL, NULL); + } + /* Always boot into physical ram. */ + bootstrap_pc = ddr_base + (entry & 0x0fffffff); + if (kernel_size < 0) { + /* If we failed loading ELF's try a raw image. */ + kernel_size = load_image_targphys(kernel_filename, ddr_base, + ram_size); + bootstrap_pc = ddr_base; + } + + env->regs[5] = ddr_base + kernel_size; + if (kernel_cmdline && (kcmdline_len = strlen(kernel_cmdline))) { + pstrcpy_targphys(env->regs[5], 256, kernel_cmdline); + } + env->regs[6] = 0; + /* Provide a device-tree. */ + env->regs[7] = ddr_base + kernel_size + 256; + petalogix_load_device_tree(env->regs[7], ram_size, + env->regs[6], 0, + kernel_cmdline); + } + + env->sregs[SR_PC] = bootstrap_pc; +} + +static QEMUMachine petalogix_s3adsp1800_machine = { + .name = "petalogix-s3adsp1800", + .desc = "Petalogix linux refdesign for xilinx Spartan 3ADSP1800", + .init = petalogix_s3adsp1800_init, + .is_default = 1 +}; + +static void petalogix_s3adsp1800_machine_init(void) +{ + qemu_register_machine(&petalogix_s3adsp1800_machine); +} + +machine_init(petalogix_s3adsp1800_machine_init); diff --git a/hw/xilinx.h b/hw/xilinx.h new file mode 100644 index 0000000000..9707a0e0b5 --- /dev/null +++ b/hw/xilinx.h @@ -0,0 +1,50 @@ + +/* OPB Interrupt Controller. */ +qemu_irq *microblaze_pic_init_cpu(CPUState *env); + +static inline DeviceState * +xilinx_intc_create(target_phys_addr_t base, qemu_irq irq, int kind_of_intr) +{ + DeviceState *dev; + + dev = qdev_create(NULL, "xilinx,intc"); + qdev_set_prop_int(dev, "kind-of-intr", kind_of_intr); + qdev_init(dev); + sysbus_mmio_map(sysbus_from_qdev(dev), 0, base); + sysbus_connect_irq(sysbus_from_qdev(dev), 0, irq); + return dev; +} + +/* OPB Timer/Counter. */ +static inline DeviceState * +xilinx_timer_create(target_phys_addr_t base, qemu_irq irq, int nr, int freq) +{ + DeviceState *dev; + + dev = qdev_create(NULL, "xilinx,timer"); + qdev_set_prop_int(dev, "nr-timers", nr); + qdev_set_prop_int(dev, "frequency", freq); + qdev_init(dev); + sysbus_mmio_map(sysbus_from_qdev(dev), 0, base); + sysbus_connect_irq(sysbus_from_qdev(dev), 0, irq); + return dev; +} + +/* XPS Ethernet Lite MAC. */ +static inline DeviceState * +xilinx_ethlite_create(NICInfo *nd, target_phys_addr_t base, qemu_irq irq, + int txpingpong, int rxpingpong) +{ + DeviceState *dev; + + qemu_check_nic_model(nd, "xilinx-ethlite"); + + dev = qdev_create(NULL, "xilinx,ethlite"); + qdev_set_netdev(dev, nd); + qdev_set_prop_int(dev, "txpingpong", txpingpong); + qdev_set_prop_int(dev, "rxpingpong", rxpingpong); + qdev_init(dev); + sysbus_mmio_map(sysbus_from_qdev(dev), 0, base); + sysbus_connect_irq(sysbus_from_qdev(dev), 0, irq); + return dev; +} diff --git a/target-microblaze/machine.c b/target-microblaze/machine.c new file mode 100644 index 0000000000..1be1c351b2 --- /dev/null +++ b/target-microblaze/machine.c @@ -0,0 +1,11 @@ +#include "hw/hw.h" +#include "hw/boards.h" + +void cpu_save(QEMUFile *f, void *opaque) +{ +} + +int cpu_load(QEMUFile *f, void *opaque, int version_id) +{ + return 0; +} |