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| author | blueswir1 <blueswir1@c046a42c-6fe2-441c-8c8c-71466251a162> | 2008-07-07 19:34:45 +0000 |
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| committer | blueswir1 <blueswir1@c046a42c-6fe2-441c-8c8c-71466251a162> | 2008-07-07 19:34:45 +0000 |
| commit | d795eb86d73c61351c70f7a9714b40e8a5c49e3d (patch) | |
| tree | 9200a4d04e2787365581a2f943e0de50be044ada /tcg | |
| parent | 6a1ef8309e23f9149ec6f4d676bb6bfc1a30b876 (diff) | |
| download | qemu-d795eb86d73c61351c70f7a9714b40e8a5c49e3d.tar.gz qemu-d795eb86d73c61351c70f7a9714b40e8a5c49e3d.tar.bz2 qemu-d795eb86d73c61351c70f7a9714b40e8a5c49e3d.zip | |
Fix 64 bit constant generation
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4854 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'tcg')
| -rw-r--r-- | tcg/sparc/tcg-target.c | 10 |
1 files changed, 6 insertions, 4 deletions
diff --git a/tcg/sparc/tcg-target.c b/tcg/sparc/tcg-target.c index 492ed3d9a1..58f86d35a7 100644 --- a/tcg/sparc/tcg-target.c +++ b/tcg/sparc/tcg-target.c @@ -304,11 +304,10 @@ static inline void tcg_out_movi(TCGContext *s, TCGType type, { #if defined(__sparc_v9__) && !defined(__sparc_v8plus__) if (!check_fit_tl(arg, 32) && (arg & ~0xffffffffULL) != 0) { - // XXX ret may be I5, need another temp - tcg_out_movi_imm32(s, TCG_REG_I5, arg >> 32); - tcg_out_arithi(s, TCG_REG_I5, TCG_REG_I5, 32, SHIFT_SLLX); + tcg_out_movi_imm32(s, TCG_REG_I4, arg >> 32); + tcg_out_arithi(s, TCG_REG_I4, TCG_REG_I4, 32, SHIFT_SLLX); tcg_out_movi_imm32(s, ret, arg); - tcg_out_arith(s, ret, ret, TCG_REG_I5, ARITH_OR); + tcg_out_arith(s, ret, ret, TCG_REG_I4, ARITH_OR); } else #endif tcg_out_movi_imm32(s, ret, arg); @@ -1137,6 +1136,9 @@ void tcg_target_init(TCGContext *s) tcg_regset_clear(s->reserved_regs); tcg_regset_set_reg(s->reserved_regs, TCG_REG_G0); +#if defined(__sparc_v9__) && !defined(__sparc_v8plus__) + tcg_regset_set_reg(s->reserved_regs, TCG_REG_I4); // for internal use +#endif tcg_regset_set_reg(s->reserved_regs, TCG_REG_I5); // for internal use tcg_regset_set_reg(s->reserved_regs, TCG_REG_I6); tcg_regset_set_reg(s->reserved_regs, TCG_REG_I7); |