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authorRichard Henderson <rth@twiddle.net>2010-03-19 13:02:02 -0700
committerAurelien Jarno <aurelien@aurel32.net>2010-03-26 21:42:46 +0100
commit8d625cf1d159b313daefec13abc637c3e8862bd5 (patch)
tree039bef06552f0da0c737109f85c9d0e2a26d7f79 /tcg/tcg-op.h
parenta10f9f4f0c947ad0aa8283b62ea012b67f883523 (diff)
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tcg: Allow target-specific implementation of EQV.
Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Diffstat (limited to 'tcg/tcg-op.h')
-rw-r--r--tcg/tcg-op.h11
1 files changed, 11 insertions, 0 deletions
diff --git a/tcg/tcg-op.h b/tcg/tcg-op.h
index f15c80351b..b535406363 100644
--- a/tcg/tcg-op.h
+++ b/tcg/tcg-op.h
@@ -1740,14 +1740,25 @@ static inline void tcg_gen_andc_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
static inline void tcg_gen_eqv_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
{
+#ifdef TCG_TARGET_HAS_eqv_i32
+ tcg_gen_op3_i32(INDEX_op_eqv_i32, ret, arg1, arg2);
+#else
tcg_gen_xor_i32(ret, arg1, arg2);
tcg_gen_not_i32(ret, ret);
+#endif
}
static inline void tcg_gen_eqv_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
{
+#ifdef TCG_TARGET_HAS_eqv_i64
+ tcg_gen_op3_i64(INDEX_op_eqv_i64, ret, arg1, arg2);
+#elif defined(TCG_TARGET_HAS_eqv_i32) && TCG_TARGET_REG_BITS == 32
+ tcg_gen_eqv_i32(TCGV_LOW(ret), TCGV_LOW(arg1), TCGV_LOW(arg2));
+ tcg_gen_eqv_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), TCGV_HIGH(arg2));
+#else
tcg_gen_xor_i64(ret, arg1, arg2);
tcg_gen_not_i64(ret, ret);
+#endif
}
static inline void tcg_gen_nand_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)