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| author | bellard <bellard@c046a42c-6fe2-441c-8c8c-71466251a162> | 2005-12-05 20:31:52 +0000 |
|---|---|---|
| committer | bellard <bellard@c046a42c-6fe2-441c-8c8c-71466251a162> | 2005-12-05 20:31:52 +0000 |
| commit | ba3c64fb476d57c35013970ac444f04f35893ca9 (patch) | |
| tree | ef1a50165c32cf861862c94cfd9bcf9ebffcd9f2 /target-sparc/cpu.h | |
| parent | b9788fc4c4974a4871e0ee46b5c06fee105a6aff (diff) | |
| download | qemu-ba3c64fb476d57c35013970ac444f04f35893ca9.tar.gz qemu-ba3c64fb476d57c35013970ac444f04f35893ca9.tar.bz2 qemu-ba3c64fb476d57c35013970ac444f04f35893ca9.zip | |
Initial SPARC SMP support (Blue Swirl)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1694 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-sparc/cpu.h')
| -rw-r--r-- | target-sparc/cpu.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/target-sparc/cpu.h b/target-sparc/cpu.h index baff0c4602..28efab758f 100644 --- a/target-sparc/cpu.h +++ b/target-sparc/cpu.h @@ -166,6 +166,7 @@ typedef struct CPUSPARCState { int exception_index; int interrupt_index; int interrupt_request; + int halted; /* NOTE: we allow 8 more registers to handle wrapping */ target_ulong regbase[NWINDOWS * 16 + 8]; |