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authoraurel32 <aurel32@c046a42c-6fe2-441c-8c8c-71466251a162>2008-12-07 22:46:31 +0000
committeraurel32 <aurel32@c046a42c-6fe2-441c-8c8c-71466251a162>2008-12-07 22:46:31 +0000
commitd8299bccf265b72db967a064e8151660b78cdfae (patch)
treed4333d881e01ccea7680165495345d8b05aa14e9 /target-sh4/op_helper.c
parent54604f74ae618aca3715cf0d8cb2ede923c0d6c0 (diff)
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SH4: Implement FD bit
SH4 manual say that if a floating point instruction is executed while FD bit in the status register is 1, an exception should be raised. QEMU presently does not do that, so the kernel does not initialize FP state for any thread, nor does it save/restore FP state. The most apparent consequence is that while recent gcc/libc expect double-precision mode to be set by kernel, they run in single-precision mode, and all FP code produces wrong values. This patch fixes this. It also fixes a couple of places where PC was not updated before handling an exception, although both those places deal with invalid instruction and don't lead to any user-visible bugs. (Vladimir Prus) git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5937 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-sh4/op_helper.c')
-rw-r--r--target-sh4/op_helper.c12
1 files changed, 12 insertions, 0 deletions
diff --git a/target-sh4/op_helper.c b/target-sh4/op_helper.c
index f3e73004a7..63522194f7 100644
--- a/target-sh4/op_helper.c
+++ b/target-sh4/op_helper.c
@@ -89,6 +89,18 @@ void helper_raise_slot_illegal_instruction(void)
cpu_loop_exit();
}
+void helper_raise_fpu_disable(void)
+{
+ env->exception_index = 0x800;
+ cpu_loop_exit();
+}
+
+void helper_raise_slot_fpu_disable(void)
+{
+ env->exception_index = 0x820;
+ cpu_loop_exit();
+}
+
void helper_debug(void)
{
env->exception_index = EXCP_DEBUG;