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| author | Tom Musta <tommusta@gmail.com> | 2014-10-29 10:02:39 -0500 |
|---|---|---|
| committer | Alexander Graf <agraf@suse.de> | 2014-11-04 23:26:15 +0100 |
| commit | 24e669ba531a0ffb5e5c3583bc39ff84eaeabf16 (patch) | |
| tree | 3346435c4a14cd3a9e3fa1fe6bb4ec86eab058a2 /target-ppc | |
| parent | 36cbde7c30ead127dcd7c03b96d4dabf10a6d6c5 (diff) | |
| download | qemu-24e669ba531a0ffb5e5c3583bc39ff84eaeabf16.tar.gz qemu-24e669ba531a0ffb5e5c3583bc39ff84eaeabf16.tar.bz2 qemu-24e669ba531a0ffb5e5c3583bc39ff84eaeabf16.zip | |
target-ppc: Fix Altivec Shifts
Fix the implementation of the Altivec shift left and shift right
instructions (vsl, vsr) which erroneously inverts shift direction
on big endian hosts.
Signed-off-by: Tom Musta <tommusta@gmail.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
Diffstat (limited to 'target-ppc')
| -rw-r--r-- | target-ppc/int_helper.c | 13 |
1 files changed, 2 insertions, 11 deletions
diff --git a/target-ppc/int_helper.c b/target-ppc/int_helper.c index 1c7e0f1f77..12c9ab08be 100644 --- a/target-ppc/int_helper.c +++ b/target-ppc/int_helper.c @@ -1552,13 +1552,6 @@ void helper_vlogefp(CPUPPCState *env, ppc_avr_t *r, ppc_avr_t *b) } } -#if defined(HOST_WORDS_BIGENDIAN) -#define LEFT 0 -#define RIGHT 1 -#else -#define LEFT 1 -#define RIGHT 0 -#endif /* The specification says that the results are undefined if all of the * shift counts are not identical. We check to make sure that they are * to conform to what real hardware appears to do. */ @@ -1588,11 +1581,9 @@ void helper_vlogefp(CPUPPCState *env, ppc_avr_t *r, ppc_avr_t *b) } \ } \ } -VSHIFT(l, LEFT) -VSHIFT(r, RIGHT) +VSHIFT(l, 1) +VSHIFT(r, 0) #undef VSHIFT -#undef LEFT -#undef RIGHT #define VSL(suffix, element, mask) \ void helper_vsl##suffix(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) \ |