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authorRajalakshmi Srinivasaraghavan <raji@linux.vnet.ibm.com>2016-09-06 10:34:06 +0530
committerDavid Gibson <david@gibson.dropbear.id.au>2016-09-23 10:29:40 +1000
commite7b1e06fbcb81ac66e2586214a6c42fdf15fadf3 (patch)
tree8f291ecba88e9543ef420de6b4eb0c88138ab747 /target-ppc/translate.c
parent6ca038c292d9274dc224d401a1ba16eb5a1dd501 (diff)
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target-ppc: add vector insert instructions
The following vector insert instructions are added from ISA 3.0. vinsertb - Vector Insert Byte vinserth - Vector Insert Halfword vinsertw - Vector Insert Word vinsertd - Vector Insert Doubleword Signed-off-by: Rajalakshmi Srinivasaraghavan <raji@linux.vnet.ibm.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Diffstat (limited to 'target-ppc/translate.c')
-rw-r--r--target-ppc/translate.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/target-ppc/translate.c b/target-ppc/translate.c
index f01ce1ea68..a27f45593b 100644
--- a/target-ppc/translate.c
+++ b/target-ppc/translate.c
@@ -498,6 +498,8 @@ EXTRACT_HELPER(UIMM, 0, 16);
EXTRACT_HELPER(SIMM5, 16, 5);
/* 5 bits signed immediate value */
EXTRACT_HELPER(UIMM5, 16, 5);
+/* 4 bits unsigned immediate value */
+EXTRACT_HELPER(UIMM4, 16, 4);
/* Bit count */
EXTRACT_HELPER(NB, 11, 5);
/* Shift count */