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authorAndreas Färber <afaerber@suse.de>2013-09-04 02:19:44 +0200
committerAndreas Färber <afaerber@suse.de>2014-03-13 19:52:47 +0100
commit00c8cb0a36f51a6866a83c08962d12a0eb21864b (patch)
tree3fc05321f0f72aa3d7612efcce6b53ede066d909 /target-ppc/excp_helper.c
parent31b030d4abc5bea89c2b33b39d3b302836f6b6ee (diff)
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cputlb: Change tlb_flush() argument to CPUState
Signed-off-by: Andreas Färber <afaerber@suse.de>
Diffstat (limited to 'target-ppc/excp_helper.c')
-rw-r--r--target-ppc/excp_helper.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/target-ppc/excp_helper.c b/target-ppc/excp_helper.c
index a2226d1923..19bc6b66ba 100644
--- a/target-ppc/excp_helper.c
+++ b/target-ppc/excp_helper.c
@@ -616,7 +616,7 @@ static inline void powerpc_excp(PowerPCCPU *cpu, int excp_model, int excp)
}
/* If we disactivated any translation, flush TLBs */
if (msr & ((1 << MSR_IR) | (1 << MSR_DR))) {
- tlb_flush(env, 1);
+ tlb_flush(cs, 1);
}
#ifdef TARGET_PPC64
@@ -671,7 +671,7 @@ static inline void powerpc_excp(PowerPCCPU *cpu, int excp_model, int excp)
/* XXX: The BookE changes address space when switching modes,
we should probably implement that as different MMU indexes,
but for the moment we do it the slow way and flush all. */
- tlb_flush(env, 1);
+ tlb_flush(cs, 1);
}
}