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| author | Andreas Färber <afaerber@suse.de> | 2013-01-17 17:30:08 +0100 |
|---|---|---|
| committer | Andreas Färber <afaerber@suse.de> | 2013-01-27 14:34:26 +0100 |
| commit | dd51dc5262b718c5f045c86ce1175842ab42d2cd (patch) | |
| tree | 2fdb6d4c729dce6fa64e95b455b89ad356dc1ca8 /target-openrisc/mmu.c | |
| parent | 8486af93771302fa3154857a7c05612f0f61cc90 (diff) | |
| download | qemu-dd51dc5262b718c5f045c86ce1175842ab42d2cd.tar.gz qemu-dd51dc5262b718c5f045c86ce1175842ab42d2cd.tar.bz2 qemu-dd51dc5262b718c5f045c86ce1175842ab42d2cd.zip | |
target-openrisc: Clean up triple QOM casts
Instead of calling openrisc_env_get_cpu(), casting to CPU() via the
ENV_GET_CPU() compatibility macro and casting back to OPENRISC_CPU(),
just call openrisc_env_get_cpu() directly.
ENV_GET_CPU() is meant as workaround for target-independent code only.
Signed-off-by: Andreas Färber <afaerber@suse.de>
Diffstat (limited to 'target-openrisc/mmu.c')
| -rw-r--r-- | target-openrisc/mmu.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/target-openrisc/mmu.c b/target-openrisc/mmu.c index 836465259a..d354e1f8b2 100644 --- a/target-openrisc/mmu.c +++ b/target-openrisc/mmu.c @@ -187,7 +187,7 @@ int cpu_openrisc_handle_mmu_fault(CPUOpenRISCState *env, int ret = 0; hwaddr physical = 0; int prot = 0; - OpenRISCCPU *cpu = OPENRISC_CPU(ENV_GET_CPU(env)); + OpenRISCCPU *cpu = openrisc_env_get_cpu(env); ret = cpu_openrisc_get_phys_addr(cpu, &physical, &prot, address, rw); @@ -209,7 +209,7 @@ int cpu_openrisc_handle_mmu_fault(CPUOpenRISCState *env, target_ulong address, int rw, int mmu_idx) { int ret = 0; - OpenRISCCPU *cpu = OPENRISC_CPU(ENV_GET_CPU(env)); + OpenRISCCPU *cpu = openrisc_env_get_cpu(env); cpu_openrisc_raise_mmu_exception(cpu, address, rw, ret); ret = 1; @@ -224,7 +224,7 @@ hwaddr cpu_get_phys_page_debug(CPUOpenRISCState *env, { hwaddr phys_addr; int prot; - OpenRISCCPU *cpu = OPENRISC_CPU(ENV_GET_CPU(env)); + OpenRISCCPU *cpu = openrisc_env_get_cpu(env); if (cpu_openrisc_get_phys_addr(cpu, &phys_addr, &prot, addr, 0)) { return -1; |