diff options
| author | Andreas Färber <afaerber@suse.de> | 2013-08-26 08:31:06 +0200 |
|---|---|---|
| committer | Andreas Färber <afaerber@suse.de> | 2014-03-13 19:20:46 +0100 |
| commit | 27103424c40ce71053c07d8a54ef431365fa9b7f (patch) | |
| tree | bec190ce2f52c17d5f5963d743f6c64af47c9240 /target-openrisc/cpu.c | |
| parent | 6f03bef0ffc5cd75ac5ffcca0383c489ae48108c (diff) | |
| download | qemu-27103424c40ce71053c07d8a54ef431365fa9b7f.tar.gz qemu-27103424c40ce71053c07d8a54ef431365fa9b7f.tar.bz2 qemu-27103424c40ce71053c07d8a54ef431365fa9b7f.zip | |
cpu: Move exception_index field from CPU_COMMON to CPUState
Signed-off-by: Andreas Färber <afaerber@suse.de>
Diffstat (limited to 'target-openrisc/cpu.c')
| -rw-r--r-- | target-openrisc/cpu.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/target-openrisc/cpu.c b/target-openrisc/cpu.c index 99e4aa7c67..b601de009c 100644 --- a/target-openrisc/cpu.c +++ b/target-openrisc/cpu.c @@ -48,7 +48,7 @@ static void openrisc_cpu_reset(CPUState *s) cpu->env.pc = 0x100; cpu->env.sr = SR_FO | SR_SM; - cpu->env.exception_index = -1; + s->exception_index = -1; cpu->env.upr = UPR_UP | UPR_DMP | UPR_IMP | UPR_PICP | UPR_TTP; cpu->env.cpucfgr = CPUCFGR_OB32S | CPUCFGR_OF32S; |