diff options
author | Andreas Färber <afaerber@suse.de> | 2013-02-02 10:57:51 +0100 |
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committer | Andreas Färber <afaerber@suse.de> | 2013-03-12 10:35:55 +0100 |
commit | 97a8ea5a3ae7938cb54fd4dc19d3a413024bc6c0 (patch) | |
tree | 6c9121e0571f75c8f5479e0027589f0d2f0178c7 /target-mips | |
parent | c3affe5670e5d0df8a7e06f1d6e80853633146df (diff) | |
download | qemu-97a8ea5a3ae7938cb54fd4dc19d3a413024bc6c0.tar.gz qemu-97a8ea5a3ae7938cb54fd4dc19d3a413024bc6c0.tar.bz2 qemu-97a8ea5a3ae7938cb54fd4dc19d3a413024bc6c0.zip |
cpu: Replace do_interrupt() by CPUClass::do_interrupt method
This removes a global per-target function and thus takes us one step
closer to compiling multiple targets into one executable.
It will also allow to override the interrupt handling for certain CPU
families.
Signed-off-by: Andreas Färber <afaerber@suse.de>
Diffstat (limited to 'target-mips')
-rw-r--r-- | target-mips/cpu-qom.h | 2 | ||||
-rw-r--r-- | target-mips/cpu.c | 2 | ||||
-rw-r--r-- | target-mips/cpu.h | 1 | ||||
-rw-r--r-- | target-mips/helper.c | 5 |
4 files changed, 7 insertions, 3 deletions
diff --git a/target-mips/cpu-qom.h b/target-mips/cpu-qom.h index c6bcddfb9a..32e3cad7bf 100644 --- a/target-mips/cpu-qom.h +++ b/target-mips/cpu-qom.h @@ -74,4 +74,6 @@ static inline MIPSCPU *mips_env_get_cpu(CPUMIPSState *env) #define ENV_OFFSET offsetof(MIPSCPU, env) +void mips_cpu_do_interrupt(CPUState *cpu); + #endif diff --git a/target-mips/cpu.c b/target-mips/cpu.c index 4d62031c36..5315f7bda0 100644 --- a/target-mips/cpu.c +++ b/target-mips/cpu.c @@ -78,6 +78,8 @@ static void mips_cpu_class_init(ObjectClass *c, void *data) mcc->parent_reset = cc->reset; cc->reset = mips_cpu_reset; + + cc->do_interrupt = mips_cpu_do_interrupt; } static const TypeInfo mips_cpu_type_info = { diff --git a/target-mips/cpu.h b/target-mips/cpu.h index 22b0497757..cedf03df43 100644 --- a/target-mips/cpu.h +++ b/target-mips/cpu.h @@ -663,7 +663,6 @@ void cpu_mips_soft_irq(CPUMIPSState *env, int irq, int level); int cpu_mips_handle_mmu_fault (CPUMIPSState *env, target_ulong address, int rw, int mmu_idx); #define cpu_handle_mmu_fault cpu_mips_handle_mmu_fault -void do_interrupt (CPUMIPSState *env); #if !defined(CONFIG_USER_ONLY) void r4k_invalidate_tlb (CPUMIPSState *env, int idx, int use_extra); hwaddr cpu_mips_translate_address (CPUMIPSState *env, target_ulong address, diff --git a/target-mips/helper.c b/target-mips/helper.c index e877b8db78..3a54acf706 100644 --- a/target-mips/helper.c +++ b/target-mips/helper.c @@ -396,10 +396,11 @@ static void set_hflags_for_handler (CPUMIPSState *env) } #endif -void do_interrupt (CPUMIPSState *env) +void mips_cpu_do_interrupt(CPUState *cs) { + MIPSCPU *cpu = MIPS_CPU(cs); + CPUMIPSState *env = &cpu->env; #if !defined(CONFIG_USER_ONLY) - MIPSCPU *cpu = mips_env_get_cpu(env); target_ulong offset; int cause = -1; const char *name; |