summaryrefslogtreecommitdiff
path: root/target-mips
diff options
context:
space:
mode:
authorRichard Sandiford <rdsandiford@googlemail.com>2013-01-20 19:28:48 +0000
committerAurelien Jarno <aurelien@aurel32.net>2013-01-31 23:38:37 +0100
commit17e8fef1af2db3a13613a311db2ec2f7a69645a1 (patch)
treed41df44a81cbb4d163ad1b21e4b1d6a43203364d /target-mips
parent810ded13792042d988c8dbdea3b97eedbd949b40 (diff)
downloadqemu-17e8fef1af2db3a13613a311db2ec2f7a69645a1.tar.gz
qemu-17e8fef1af2db3a13613a311db2ec2f7a69645a1.tar.bz2
qemu-17e8fef1af2db3a13613a311db2ec2f7a69645a1.zip
target-mips: Fix signedness of loads in MIPS16 RESTOREs
Make RESTORE use sign-extending rather than zero-extending loads. Signed-off-by: Richard Sandiford <rdsandiford@googlemail.com> Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Diffstat (limited to 'target-mips')
-rw-r--r--target-mips/translate.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/target-mips/translate.c b/target-mips/translate.c
index 8722638678..8520d28519 100644
--- a/target-mips/translate.c
+++ b/target-mips/translate.c
@@ -9446,7 +9446,7 @@ static void gen_mips16_restore (DisasContext *ctx,
#define DECR_AND_LOAD(reg) do { \
tcg_gen_subi_tl(t0, t0, 4); \
- tcg_gen_qemu_ld32u(t1, t0, ctx->mem_idx); \
+ tcg_gen_qemu_ld32s(t1, t0, ctx->mem_idx); \
gen_store_gpr(t1, reg); \
} while (0)