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authorYongbok Kim <yongbok.kim@imgtec.com>2015-07-10 12:10:02 +0100
committerLeon Alrae <leon.alrae@imgtec.com>2015-07-28 08:57:51 +0100
commitda52a4dfcc4864fd2260ec4eab331f75b1f0240b (patch)
treebce577918dafec5176ffc2debd6c7c8ea53b0d75 /target-mips/op_helper.c
parent8bcbb834a015432bfb4d09a883c21f017eadd978 (diff)
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target-mips: fix offset calculation for Interrupts
Correct computation of vector offsets for EXCP_EXT_INTERRUPT. For instance, if Cause.IV is 0 the vector offset should be 0x180. Simplify the finding vector number logic for the Vectored Interrupts. Signed-off-by: Yongbok Kim <yongbok.kim@imgtec.com> Reviewed-by: Leon Alrae <leon.alrae@imgtec.com> [leon.alrae@imgtec.com: cosmetic changes] Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
Diffstat (limited to 'target-mips/op_helper.c')
-rw-r--r--target-mips/op_helper.c2
1 files changed, 0 insertions, 2 deletions
diff --git a/target-mips/op_helper.c b/target-mips/op_helper.c
index 9c28631dc1..db4f6b9463 100644
--- a/target-mips/op_helper.c
+++ b/target-mips/op_helper.c
@@ -1432,7 +1432,6 @@ void helper_mttc0_status(CPUMIPSState *env, target_ulong arg1)
void helper_mtc0_intctl(CPUMIPSState *env, target_ulong arg1)
{
- /* vectored interrupts not implemented, no performance counters. */
env->CP0_IntCtl = (env->CP0_IntCtl & ~0x000003e0) | (arg1 & 0x000003e0);
}
@@ -1473,7 +1472,6 @@ target_ulong helper_mftc0_ebase(CPUMIPSState *env)
void helper_mtc0_ebase(CPUMIPSState *env, target_ulong arg1)
{
- /* vectored interrupts not implemented */
env->CP0_EBase = (env->CP0_EBase & ~0x3FFFF000) | (arg1 & 0x3FFFF000);
}