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authorJames Hogan <james.hogan@imgtec.com>2015-07-09 10:17:15 +0100
committerPeter Maydell <peter.maydell@linaro.org>2015-07-09 13:51:27 +0100
commit5a2db89615c8efabbeca74fe5e0f14f312d3bbe3 (patch)
tree596488def39a6ea8ed0ff15417990a0296cae4f9 /target-mips/kvm.c
parenta8f13961fdcff3a5969b9884368e875aa068f1c9 (diff)
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mips/kvm: Sync with newer MIPS KVM headers
The KVM_REG_MIPS_COUNT_* definitions are now included in linux-headers/asm-mips/kvm.h since commit b061808d39fa ("linux-headers: update linux headers to kvm/next"), therefore the duplicate definitions in target-mips/kvm.c can now be dropped (the definitions were tweaked slightly in commit 7a52ce8a1607 ("linux-headers: update") which triggered the following build warnings turned errors): target-mips/kvm.c:232:0: error: "KVM_REG_MIPS_COUNT_CTL" redefined [-Werror] linux-headers/asm/kvm.h:129:0: note: this is the location of the previous definition target-mips/kvm.c:236:0: error: "KVM_REG_MIPS_COUNT_RESUME" redefined [-Werror] linux-headers/asm/kvm.h:141:0: note: this is the location of the previous definition target-mips/kvm.c:239:0: error: "KVM_REG_MIPS_COUNT_HZ" redefined [-Werror] linux-headers/asm/kvm.h:147:0: note: this is the location of the previous definition Also update the MIPS_C0_{32,64} macros to utilise definitions more recently added to the asm-mips/kvm.h header. Signed-off-by: James Hogan <james.hogan@imgtec.com> Reviewed-by: Leon Alrae <leon.alrae@imgtec.com> Message-id: 1436433435-24898-3-git-send-email-james.hogan@imgtec.com Cc: Paolo Bonzini <pbonzini@redhat.com> Cc: Leon Alrae <leon.alrae@imgtec.com> Cc: Aurelien Jarno <aurelien@aurel32.net> Cc: kvm@vger.kernel.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target-mips/kvm.c')
-rw-r--r--target-mips/kvm.c15
1 files changed, 2 insertions, 13 deletions
diff --git a/target-mips/kvm.c b/target-mips/kvm.c
index 7d2293d934..bd64a70bcd 100644
--- a/target-mips/kvm.c
+++ b/target-mips/kvm.c
@@ -212,10 +212,10 @@ int kvm_mips_set_ipi_interrupt(MIPSCPU *cpu, int irq, int level)
}
#define MIPS_CP0_32(_R, _S) \
- (KVM_REG_MIPS | KVM_REG_SIZE_U32 | 0x10000 | (8 * (_R) + (_S)))
+ (KVM_REG_MIPS_CP0 | KVM_REG_SIZE_U32 | (8 * (_R) + (_S)))
#define MIPS_CP0_64(_R, _S) \
- (KVM_REG_MIPS | KVM_REG_SIZE_U64 | 0x10000 | (8 * (_R) + (_S)))
+ (KVM_REG_MIPS_CP0 | KVM_REG_SIZE_U64 | (8 * (_R) + (_S)))
#define KVM_REG_MIPS_CP0_INDEX MIPS_CP0_32(0, 0)
#define KVM_REG_MIPS_CP0_CONTEXT MIPS_CP0_64(4, 0)
@@ -232,17 +232,6 @@ int kvm_mips_set_ipi_interrupt(MIPSCPU *cpu, int irq, int level)
#define KVM_REG_MIPS_CP0_EPC MIPS_CP0_64(14, 0)
#define KVM_REG_MIPS_CP0_ERROREPC MIPS_CP0_64(30, 0)
-/* CP0_Count control */
-#define KVM_REG_MIPS_COUNT_CTL (KVM_REG_MIPS | KVM_REG_SIZE_U64 | \
- 0x20000 | 0)
-#define KVM_REG_MIPS_COUNT_CTL_DC 0x00000001 /* master disable */
-/* CP0_Count resume monotonic nanoseconds */
-#define KVM_REG_MIPS_COUNT_RESUME (KVM_REG_MIPS | KVM_REG_SIZE_U64 | \
- 0x20000 | 1)
-/* CP0_Count rate in Hz */
-#define KVM_REG_MIPS_COUNT_HZ (KVM_REG_MIPS | KVM_REG_SIZE_U64 | \
- 0x20000 | 2)
-
static inline int kvm_mips_put_one_reg(CPUState *cs, uint64_t reg_id,
int32_t *addr)
{