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authorths <ths@c046a42c-6fe2-441c-8c8c-71466251a162>2008-05-04 08:16:10 +0000
committerths <ths@c046a42c-6fe2-441c-8c8c-71466251a162>2008-05-04 08:16:10 +0000
commit3945462805beb52cdc3e42eff948afbe2e7c4683 (patch)
treead88300b5a090520568839df676d1ff0e39cdebd /target-mips/exec.h
parentf730fd27b8e358efb3f7b31a564ecc6b1543b689 (diff)
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Simplify mips branch handling. Retire T2 from use. Use TCG for branches.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4320 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-mips/exec.h')
-rw-r--r--target-mips/exec.h6
1 files changed, 2 insertions, 4 deletions
diff --git a/target-mips/exec.h b/target-mips/exec.h
index b612cec70f..5b8206acf7 100644
--- a/target-mips/exec.h
+++ b/target-mips/exec.h
@@ -13,11 +13,9 @@ register struct CPUMIPSState *env asm(AREG0);
#if TARGET_LONG_BITS > HOST_LONG_BITS
#define T0 (env->t0)
#define T1 (env->t1)
-#define T2 (env->t2)
#else
-register target_ulong T0 asm(AREG1);
-register target_ulong T1 asm(AREG2);
-register target_ulong T2 asm(AREG3);
+register target_ulong T0 asm(AREG2);
+register target_ulong T1 asm(AREG3);
#endif
#if defined (USE_HOST_FLOAT_REGS)