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author | j_mayer <j_mayer@c046a42c-6fe2-441c-8c8c-71466251a162> | 2007-10-14 07:07:08 +0000 |
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committer | j_mayer <j_mayer@c046a42c-6fe2-441c-8c8c-71466251a162> | 2007-10-14 07:07:08 +0000 |
commit | 6ebbf390003270afece028facef4d9834df81a8c (patch) | |
tree | adc8e9a3d586d5b1b550543fceb6ffdaeda03f6a /target-mips/exec.h | |
parent | d0f48074dbc21248f3b0a9fb48126cb0d95991b5 (diff) | |
download | qemu-6ebbf390003270afece028facef4d9834df81a8c.tar.gz qemu-6ebbf390003270afece028facef4d9834df81a8c.tar.bz2 qemu-6ebbf390003270afece028facef4d9834df81a8c.zip |
Replace is_user variable with mmu_idx in softmmu core,
allowing support of more than 2 mmu access modes.
Add backward compatibility is_user variable in targets code when needed.
Implement per target cpu_mmu_index function, avoiding duplicated code
and #ifdef TARGET_xxx in softmmu core functions.
Implement per target mmu modes definitions. As an example, add PowerPC
hypervisor mode definition and Alpha executive and kernel modes definitions.
Optimize PowerPC case, precomputing mmu_idx when MSR register changes
and using the same definition in code translation code.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3384 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-mips/exec.h')
-rw-r--r-- | target-mips/exec.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/target-mips/exec.h b/target-mips/exec.h index 45be7b37c7..c6dc25cf6e 100644 --- a/target-mips/exec.h +++ b/target-mips/exec.h @@ -105,7 +105,7 @@ void do_pmon (int function); void dump_sc (void); int cpu_mips_handle_mmu_fault (CPUState *env, target_ulong address, int rw, - int is_user, int is_softmmu); + int mmu_idx, int is_softmmu); void do_interrupt (CPUState *env); void r4k_invalidate_tlb (CPUState *env, int idx, int use_extra); |