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| author | Stefan Weil <weil@mail.berlios.de> | 2011-03-13 15:44:02 +0100 |
|---|---|---|
| committer | Aurelien Jarno <aurelien@aurel32.net> | 2011-04-03 21:42:57 +0200 |
| commit | 4ff9786c67f7c7180f33ec146e9acc9ce90adfa9 (patch) | |
| tree | ea0d8ee051b025347f3ea54c280ac9fa41735788 /target-microblaze | |
| parent | 2055283bcc8292fd63c772ed90a2502f427b2174 (diff) | |
| download | qemu-4ff9786c67f7c7180f33ec146e9acc9ce90adfa9.tar.gz qemu-4ff9786c67f7c7180f33ec146e9acc9ce90adfa9.tar.bz2 qemu-4ff9786c67f7c7180f33ec146e9acc9ce90adfa9.zip | |
Fix trivial "endianness bugs"
Replace endianess -> endianness.
Signed-off-by: Stefan Weil <weil@mail.berlios.de>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Diffstat (limited to 'target-microblaze')
| -rw-r--r-- | target-microblaze/translate.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/target-microblaze/translate.c b/target-microblaze/translate.c index fdb2b40df9..b54b169b18 100644 --- a/target-microblaze/translate.c +++ b/target-microblaze/translate.c @@ -923,7 +923,7 @@ static void dec_load(DisasContext *dc) /* * When doing reverse accesses we need to do two things. * - * 1. Reverse the address wrt endianess. + * 1. Reverse the address wrt endianness. * 2. Byteswap the data lanes on the way back into the CPU core. */ if (rev && size != 4) { |